74LVTH162240MEA

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74LVT162240 74LVTH162240
DC Electrical Characteristics (Continued)
Note 5: All typical values are at V
CC
3.3V, T
A
25 C.
Note 6: Applies to bushold versions only (74LVTH162240).
Note 7: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 8: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 9: This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics (Note 10)
Note 10: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 11: Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Note 12: All typical values are at V
CC
3.3V, T
A
25 C.
Note 13: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance (Note 14)
Note 14: Capacitance is measured at frequency f 1 MHz, per MIL-STD-883, Method 3012.
Symbol Parameter
V
CC
(V)
T
A
40 C to 85 C
Units Conditions
Min Typ Max
(Note 5)
I
CCZ
Power Supply Current
3.6 0.19 mA
V
CC
V
O
5.5V,
Outputs Disabled
I
CC
Increase in Power Supply Current
3.6 0.2 mA
One Input at V
CC
0.6V
(Note 9) Other Inputs at V
CC
or GND
Symbol Parameter
V
CC
T
A
25 C
Units
Conditions
(V) Min Typ Max
C
L
50 pF, R
L
500
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3 0.8 V (Note 11)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3 0.8 V (Note 11)
Symbol Parameter
T
A
40 C to 85 C, C
L
50 pF, R
L
500
Units
V
CC
3.3V 0.3V V
CC
2.7V
Min Typ Max Min Max
(Note 12)
t
PLH
Propagation Delay Data to Output 1.0 4.0 1.0 4.8
ns
t
PHL
1.0 4.0 1.0 4.6
t
PZH
Output Enable Time 1.0 4.8 1.0 5.7
ns
t
PZL
1.0 4.9 1.0 6.1
t
PHZ
Output Disable Time 2.0 4.9 2.0 5.4
ns
t
PLZ
2.0 4.5 2.0 4.5
t
OSHL
Output to Output Skew
1.0 1.0 ns
t
OSLH
(Note 13)
Symbol Parameter Conditions Typical Units
C
IN
Input Capacitance V
CC
0V, V
I
0V or V
CC
4pF
C
OUT
Output Capacitance V
CC
3.0V, V
O
0V or V
CC
8pF
5 www.fairchildsemi.com
74LVT162240 74LVTH162240
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
Package Number MS48A
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74LVT162240 74LVTH162240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs and 25:
Series Resistors in the Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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74LVTH162240MEA

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Buffers & Line Drivers 16-Bit Buf/Line Drv
Lifecycle:
New from this manufacturer.
Delivery:
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