Philips Semiconductors Product specification
74F1668-bit bidirectional universal shift register
Feb. 14, 1991
7
AC SETUP REQUIREMENTS
LIMITS
T
amb
= +25°C T
amb
= 0°C to
+70°C
T
amb
= –40°C to +85°C
SYMBOL PARAMETER TEST V
CC
= +5.0V
V
CC
= +5.0V ± 10% V
CC
= +5.0V ± 10%
UNIT
CONDITION C
L
= 50pF,
R
L
= 500Ω
C
L
= 50pF,
R
L
= 500Ω
C
L
= 50pF,
R
L
= 500Ω
MIN TYP MAX MIN MAX MIN MAX
t
su
(H)
t
su
(L)
Setup time, high or low
Dn, Ds to CP, CE
Waveform 3
3.0
2.5
4.0
3.0
4.0
3.0
ns
t
h
(H)
t
h
(L)
Hold time, high or low
Dn, Ds to CP
Waveform 3
0.0
0.0
1.0
0.0
1.0
0.0
ns
t
h
(H)
t
h
(L)
Hold time, high or low
Dn, Ds to CE
Waveform 3
1.5
0.0
2.0
0.0
2.0
0.0
ns
t
su
(L)
Setup time, low
CE to CP
Waveform 3 5.0 6.0 6.0 ns
t
h
(H)
Hold time, high
CE to CP
Waveform 3 0.0 0.0 0.0 ns
t
su
(H)
t
su
(L)
Setup time, high or low
PE to CP, CE
Waveform 3
3.0
3.0
4.0
4.0
4.0
6.0
ns
t
h
(H)
t
h
(L)
Hold time, high or low
PE to CP
Waveform 3
0.0
0.0
0.0
0.0
0.0
0.0
ns
t
w
(H)
t
w
(L)
CP pulse width,
high or low
Waveform 1
3.0
4.5
3.5
5.0
3.5
6.0
ns
t
w
(L) MR pulse width, low Waveform 2 4.0 4.0 4.0 ns
t
rec
Recovery time
,
MR to CP Waveform 2 4.0 4.5 4.5 ns
AC WAVEFORMS
t
W
(H)
CP
Q7
V
M
V
M
V
M
V
M
V
M
1/f
MAX
t
W
(L)
t
PHL
t
PLH
SF00287
Waveform 1. Propagation delay for clock input to output,
clock pulse width, and maximum clock frequency
CP
V
M
V
M
V
M
V
M
t
PHL
t
rec
MR
Q7
t
w
(L)
SF00288
SF00288
Waveform 2. Master reset pulse width, master reset to output
delay and master reset to clock recovery time
