ADF4116/ADF4117/ADF4118
Rev. D | Page 4 of 28
Parameter B Version
1
Y Version
2
Unit Test Conditions/Comments
POWER SUPPLIES
AV
DD
2.7 to 5.5 2.7 to 5.5 V min to V max
DV
DD
AV
DD
AV
DD
V
P
AV
DD
to 6.0 AV
DD
to 6.0 V min to V max AV
DD
≤ V
P
≤ 6.0 V
I
DD
(AI
DD
+ DI
DD
)
6
ADF4116 5.5 mA max 4.5 mA typical
ADF4117 5.5 mA max 4.5 mA typical
ADF4118 7.5 7.5 mA max 6.5 mA typical
I
P
0.4 0.4 mA max T
A
= 25°C
Low-Power Sleep Mode 1 1 μA typ
NOISE CHARACTERISTICS
ADF4118 Normalized Phase Noise
Floor
7
−213 −213 dBc/Hz typ
Phase Noise Performance
8
@ VCO output
ADF4116 540 MHz Output
9
−89 −89 dBc/Hz typ @ 1 kHz offset and 200 kHz PFD frequency
ADF4117 900 MHz Output
10
−87 −87 dBc/Hz typ @ 1 kHz offset and 200 kHz PFD frequency
ADF4118 900 MHz Output
10
−90 −90 dBc/Hz typ @ 1 kHz offset and 200 kHz PFD frequency
ADF4117 836 MHz Output
11
−78 −78 dBc/Hz typ @ 300 Hz offset and 30 kHz PFD frequency
ADF4118 1750 MHz Output
12
−85 −85 dBc/Hz typ @ 1 kHz offset and 200 kHz PFD frequency
ADF4118 1750 MHz Output
13
−65 −65 dBc/Hz typ @ 200 Hz offset and 10 kHz PFD frequency
ADF4118 1960 MHz Output
14
−84 −84 dBc/Hz typ @ 1 kHz offset and 200 kHz PFD frequency
Spurious Signals
ADF4116 540 MHz Output
10
−88/−99 −88/−99 dBc typ @ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4117 900 MHz Output
10
−90/−104 −90/−104 dBc typ @ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4118 900 MHz Output
10
−91/−100 −91/−100 dBc typ @ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4117 836 MHz Output
11
−80/−84 −80/−84 dBc typ @ 30 kHz/60 kHz and 30 kHz PFD frequency
ADF4118 1750 MHz Output
12
−88/−90 −88/−90 dBc typ @ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4118 1750 MHz Output
13
−65/−73 −65/−73 dBc typ @ 10 kHz/20 kHz and 10 kHz PFD frequency
ADF4118 1960 MHz Output
14
−80/−86 −80/−86 dBc typ @ 200 kHz/400 kHz and 200 kHz PFD frequency
1
Operating temperature range for the B version is −40°C to +85°C.
2
Operating temperature range for the Y version is −40°C to +125°C.
3
This is the maximum operating frequency of the CMOS counters.
4
AC coupling ensures AV
DD
/2 bias. See Figure 35 for typical circuit.
5
Guaranteed by design.
6
T
A
= 25°C; AV
DD
= DV
DD
= 3 V; RF
IN
for ADF4116 = 540 MHz; RF
IN
for ADF4117, ADF4118 = 900 MHz.
7
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO, PN
TOT
, and subtracting 20logN (where N is the N
divider value) and 10logF
PFD
: PN
SYNTH
= PN
TOT
– 10logF
PFD
– 20logN.
8
The phase noise is measured with the EVAL-ADF411xEB and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REF
IN
for the synthesizer
(f
REFOUT
= 10 MHz @ 0 dBm).
9
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; offset frequency = 1 kHz; f
RF
= 540 MHz; N = 2700; loop bandwidth = 20 kHz.
10
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; offset frequency = 1 kHz; f
RF
= 900 MHz; N = 4500; loop bandwidth = 20 kHz.
11
f
REFIN
= 10 MHz; f
PFD
= 30 kHz; offset frequency = 300 Hz; f
RF
= 836 MHz; N = 27867; loop bandwidth = 3 kHz.
12
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; offset frequency = 1 kHz; f
RF
= 1750 MHz; N = 8750; loop bandwidth = 20 kHz.
13
f
REFIN
= 10 MHz; f
PFD
= 10 kHz; offset frequency = 200 Hz; f
RF
= 1750 MHz; N = 175000; loop bandwidth = 1 kHz.
14
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; offset frequency = 1 kHz; f
RF
= 1960 MHz; N = 9800; loop bandwidth = 20 kHz.
