74LV03D,118

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74LV03
Quad 2-input NAND gate
Product data
Supersedes data of 1998 Apr 20
2003 Mar 03
INTEGRATED CIRCUITS
Philips Semiconductors Product data
74LV03
Quad 2-input NAND gate
2
2003 Mar 03
FEATURES
Wide operating voltage: 1.0 V to 5.5 V
Optimized for Low Voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V @ V
CC
= 3.3 V,
T
amb
= 25 °C
Typical V
OHV
(output V
OH
undershoot) > 2 V @ V
CC
= 3.3 V,
T
amb
= 25 °C
Level shifter capability
Output capability: standard (open drain)
I
CC
category: SSI
DESCRIPTION
The 74LV03 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT03.
The 74LV03 provides the 2-input NAND function.
The 74LV03 has open-drain N-transistor outputs, which are not
clamped by a diode connected to V
CC
. In the OFF-state, i.e., when
one input is LOW, the output may be pulled to any voltage between
GND and V
Omax
. This allows the device to be used as a
LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation
and OR-tied output applications, these devices must have a pull-up
resistor to establish a logic HIGH level.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25 °C; t
r
=t
f
2.5 ns
SYMBOL
PARAMETER CONDITIONS TYPICAL UNIT
t
PZL
/t
PLZ
Propagation delay
nA, nB to nY
C
L
= 15 pF
V
CC
= 3.3 V
8 ns
C
I
Input capacitance 3.5 pF
C
PD
Power dissipation capacitance per gate Notes 1, 2 4 pF
NOTES:
1C
PD
is used to determine the dynamic power dissipation (P
D
in µW)
P
D
= C
PD
× V
CC
2
× f
i
× N +Σ (C
L
× V
CC
2
× f
o
) where:
N = the number of outputs switching;
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
Σ (C
L
× V
CC
2
× f
o
) = sum of the outputs.
2 The condition is V
I
= GND to V
CC
3 The given value of C
PD
is obtained with : C
L
= 0 pF and R
L
=
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE ORDER CODE PKG. DWG. #
14-Pin Plastic SO –40 °C to +125 °C 74LV03D SOT108-1
PIN CONFIGURATION
14
13
12
11
10
9
87
6
5
4
3
2
1
GND
V
CC
3B
3A
3Y
4Y
4B
4A
1A
1B
2Y
1Y
2A
2B
SV00354
PIN DESCRIPTION
PIN
NUMBER
SYMBOL FUNCTION
1, 4, 9, 12 1A to 4A Data inputs
2, 5, 10, 13 1B to 4B Data inputs
3, 6, 8, 11 1Y to 4Y Data outputs
7 GND Ground (0 V)
14 V
CC
Positive supply voltage

74LV03D,118

Mfr. #:
Manufacturer:
Nexperia
Description:
Logic Gates 3.3V QUAD 2-INPUT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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