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MC100EP809FAR2

P1-P3P4-P6P7-P9P10-P10
MC100EP809
www.onsemi.com
4
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC1
Core Power Supply GND = 0 V V
CC0
= 1.6 to 2.0 V 4 V
V
CC0
HSTL Output Power Supply GND = 0 V V
CC1
= 3.0 to 3.6 V 4 V
V
I
Input Voltage GND = 0 V V
I
v V
CC1
4 V
I
out
Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range 0 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
LQFP−32
LQFP−32
80
55
°C/W
°C/W
JC
Thermal Resistance (Junction−to−Case) Standard Board LQFP−32 12 to 17 °C/W
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
QFN−32
QFN−32
31
27
°C/W
°C/W
JC
Thermal Resistance (Junction−to−Case) 2S2P QFN−32 12 °C/W
T
sol
Wave Solder Pb
Pb−Free
265
265
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 5. LVPECL DC CHARACTERISTICS V
CCI
= 3.0 V to 3.6 V; V
CCO
= 1.6 V to 2.0 V, GND = 0 V
Symbo
l
Characteristic
0°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
I
CC
Core Power Supply Current 75 95 115 75 95 115 75 95 115 mA
V
IH
Input HIGH Voltage (Single−Ended) V
CCI
−
1.165
V
CCI
−
0.88
V
CCI
−
1.165
V
CCI
−
0.88
V
CCI
−
1.165
V
CCI
−
0.88
V
V
IL
Input LOW Voltage (Single−Ended) V
CCI
−
1.945
V
CCI
−
1.6
V
CCI
−
1.945
V
CCI
−
1.6
V
CCI
−
1.945
V
CCI
−
1.6
V
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 2) (Figure 5)
LVPECL_CLK/LVPECL_CLK
1.2 V
CCI
1.2 V
CCI
1.2 V
CCI
V
I
IH
Input HIGH Current −150 150 −150 150 −150 150
A
I
IL
Input LOW Current −150 150 −150 150 −150 150
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. V
IHCMR
max varies 1:1 with V
CCI
. The V
IHCMR
range is referenced to the most positive side of the differential input signal.
MC100EP809
www.onsemi.com
5
Table 6. LVTTL/LVCMOS DC CHARACTERISTICS V
CCI
= 3.0 V to 3.6 V; V
CCO
= 1.6 V to 2.0 V, GND = 0 V
Symbo
l
Characteristic
0°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
V
IH
Input HIGH Voltage 2.0 2.0 2.0 V
V
IL
Input LOW Voltage 0.8 0.8 0.8 V
I
IH
Input HIGH Current −150 150 −150 150 −150 150
A
I
IL
Input LOW Current −300 300 −300 300 −300 300
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
Table 7. HSTL DC CHARACTERISTICS V
CCI
= 3.0 V to 3.6 V; V
CCO
= 1.6 V to 2.0 V, GND = 0 V
Symbo
l
Characteristic
0°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
V
OH
Output HIGH Voltage (Note 3) 1.0 1.2 1.0 1.2 1.0 1.2 V
V
OL
Output LOW Voltage (Note 3) 0.1 0.4 0.1 0.4 0.1 0.4 V
V
IH
Input HIGH Voltage (Figure 6) V
X
+
0.1
1.6 V
X
+
0.1
1.6 V
X
+
0.1
1.6 V
V
IL
Input LOW Voltage (Figure 6) −0.3 V
X
−
0.1
−0.3 V
X
−
0.1
−0.3 V
X
−
0.1
V
V
X
HSTL Input Crossover Voltage 0.68 − 0.9 0.68 − 0.9 0.68 − 0.9 V
I
IH
Input HIGH Current −150 150 −150 150 −150 150
A
I
IL
Input LOW Current −300 300 −300 300 −300 300
A
V
IHCMR
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 4)
HSTL_CLK/HSTL_CLK
0.6 V
CCI
− 1.2
0.6 V
CCI
− 1.2
0.6 V
CCI
− 1.2
V
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
3. All outputs loaded with 50 to GND (Figure 7).
4. V
IHCMR
max varies 1:1 with V
CCI
. The V
IHCMR
range is referenced to the most positive side of the differential input signal.
MC100EP809
www.onsemi.com
6
Table 8. AC CHARACTERISTICS V
CCI
= 3.0 V to 3.6 V; V
CCO
= 1.6 V to 2.0 V, GND = 0 V (Note 5)
Symbo
l
Characteristic
0°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
V
Opp
Differential Output Voltage f
out
< 100 MHz
(Figure 4) f
out
< 500 MHz
f
out
< 750 MHz
600
600
450
850
750
575
600
600
450
850
750
575
600
600
450
850
750
575
mV
mV
t
PLH
t
PHL
Propagation Delay (Differential Configura-
tion) LVPECL_CLK to Q
HSTL_CLK to Q
680
690
800
830
930
990
700
700
820
850
950
1000
780
790
920
950
1070
1110
ps
ps
t
skew
Within−Device Skew (Note 6)
Device−to−Device Skew (Note 7)
15
100
50
200
15
100
50
200
15
100
50
200
ps
ps
t
JITTER
Random Clock Jitter (Figure 4) (RMS) 1.4 3.0 1.4 3.0 1.4 3.0 ps
V
PP
Input Swing (Differential Configuration)
(Note 8) (Figure 5) LVPECL
HSTL
200
200
200
200
200
200
mV
mV
t
S
OE Set Up Time (Note 9) 0.5 0.5 0.5 ns
t
H
OE Hold Time 0.5 0.5 0.5 ns
t
r
/t
f
Output Rise/Fall Time
(20% − 80%)
350 600 350 450 600 350 600 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
5. Measured with 750 mV (LVPECL) source or 1 V (HSTL) source, 50% duty cycle clock source. All outputs loaded with 50 to GND (Figure 7).
6. Skew is measured between outputs under identical transitions and conditions on any one device.
7. Device−to−Device skew for identical transitions and conditions.
8. V
PP
is the Differential Input Voltage swing required to maintain AC characteristics listed herein.
9. OE Set Up Time is defined with respect to the rising edge of the clock. OE High−to−Low transition ensures outputs remain disabled during
the next clock cycle. OE Low−to−High transition enables normal operation of the next input clock (Figure 9).
0
100
200
300
400
500
600
700
800
900
0 100 200 300 400 500 600 700 800 900 1000
Figure 4. Output Frequency (F
OUT
) versus Output Voltage (V
OPP
) and Random Clock Jitter (t
JITTER
)
2
3
4
5
6
7
8
V
OPP
(mV)
t
JITTER
ps (RMS)
9
1
FREQUENCY (MHz)
V
OPP
RMS JITTER
P1-P3P4-P6P7-P9P10-P10

MC100EP809FAR2

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Manufacturer:
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IC CLK BUFFER 1:9 750MHZ 32LQFP
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