MAX5953A/MAX5953B/MAX5953C/MAX5953D
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
10 ______________________________________________________________________________________
Pin Description
FUNCTION
1, 2, 3, 5, 7, 12, 13, 14, 17,
19, 35, 38, 46, 47, 48
N.C. No Connection. Not internally connected. Make no electrical connection to these pins.
4 V+ Positive Input Power. Referenced to V
EE
.
6
UVLO
Undervoltage Lockout Programming Input for PD Interface. UVLO is referenced to V
EE
.
When UVLO is above its threshold, the device enters the power mode. Connect UVLO to
V
EE
to use the default undervoltage lockout threshold. Connect UVLO to the center of an
external resistor-divider between V+ and V
EE
to define a threshold externally. The series
resistance value of the external resistors must add to 25.5kΩ (±1%) and replaces the
detection resistor. To keep the device in undervoltage lockout, drive UVLO between
V
TH,G,UVLO
and V
REF,UVLO
.
6
N.C. No Connection. Not internally connected. Make no electrical connection to this pin.
8
RCLASS
Classification Setting for PD Interface. RCLASS is referenced to V
EE
. Add a resistor from
RCLASS to V
EE
to set a PD class (see Tables 1 and 2).
9 GATE
Gate of Internal Isolation n-Channel Power MOSFET. GATE is referenced to V
EE
. GATE
sources 10µA when the device enters power mode. Connect an external 100V ceramic
capacitor from GATE to OUT to program the inrush current. Drive GATE to V
EE
to turn off
the internal MOSFET. The detection and classification functions operate normally when
GATE is driven to V
EE
.
10, 11 V
EE
Negative Input Power. Source of the integrated isolation n-channel power MOSFET.
15, 16 OUT
Output Voltage. OUT is referenced to V
EE
. OUT is connected to the drain of the integrated
isolation n-channel power MOSFET. Connect OUT to GND.
18
PGOOD
Active-High, Open-Drain Power-Good Indicator Output for PD Interface. PGOOD is
referenced to OUT. PGOOD goes high impedance when V
OUT
is within 1.2V of V
EE
and
when V
GATE
is 5V above V
EE
. Otherwise, PGOOD is internally pulled to OUT (given that
V
OUT
is at least 5V below V+). PGOOD can be connected directly to CSS or DCUVLO to
enable/disable the DC-DC converter.
18
PGOOD
Active-Low, Open-Drain Power-Good Indicator Output for PD Interface. PGOOD is
referenced to V
EE
. PGOOD is pulled to V
EE
when V
OUT
is within 1.2V of V
EE
and when
V
GATE
is 5V above V
EE
. Otherwise, PGOOD goes high impedance.
20 CS
Current-Sense Input for PWM Controller. CS is referenced to PGND. The current-limit
threshold is internally set to 156mV relative to PGND. The device has an internal noise filter.
If necessary, connect an external RC filter from CS to PGND for additional filtering.
21
PPWM
PWM Pulse Output. Referenced to GND. PPWM leads the internal power MOSFET pulse by
approximately 100ns.
22 GND Signal Ground of PWM Controller. Connect GND to PGND.
23
PGND
Power Ground of the DC-DC Converter Power Stage. Connect PGND to GND.
24 CSS
Soft-Start Timing Capacitor Connection for PWM Controller. CSS is referenced to GND.
Connect a 0.01µF or greater ceramic capacitor from CSS to GND. Connect to PGOOD to
automatically enable the PWM controller from the PD interface.
