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PC412S0NIP0F

P1-P3P4-P6P7-P9P10-P12P13-P13
7
Sheet No.: D2-A08602EN
PC412S0NIP0F Series
Fig.5 Input High Level Supply Current vs.
Ambient Temperature
Fig.6 Input Low Level Supply Current vs.
Ambient Temperature
Fig.7
Output High Level Supply Current vs.
Ambient Temperature
Fig.8
Output Low Level Supply Current vs.
Ambient Temperature
Input high level supply current l
CCIL
(mA)
Ambient temperature T
a
(C)
0
0.5
1
1.5
2
2.5
3
−40 −20020406080
V
CC1
=5V
V
IN
=5V
Input low level supply current l
CCIL
(mA)
Ambient temperature T
a
(C)
0
2
4
6
8
10
−40 −200 20406080
V
CC1
=5V
V
IN
=0V
Output high level supply current l
CCIL
(mA)
Ambient temperature T
a
(C)
0
1
2
3
4
5
−40 −200 20406080
V
CC1
=V
CC2
=5V
V
IN
=5V
Output low level supply current l
CCIL
(mA)
Ambient temperature T
a
(C)
0
0.5
1
1.5
2
2.5
3
−40 −200 20406080
V
CC1
=V
CC2
=5V
V
IN
=0V
High level output voltage V
OH
(V)
Ambient temperature T
a
(C)
4
4.2
4.4
4.6
4.8
5
5.2
−40 −200 20406080
V
CC1
=V
CC2
=5V
V
IN
=5V
I
O
=−20μA
I
O
=−4mA
Low level output voltage V
OL
(V)
Ambient temperature T
a
(C)
0
0.1
0.2
0.3
0.4
0.5
−40 −200 20406080
V
CC1
=V
CC2
=5V
V
IN
=0V
I
O
= 4mA
I
O
= 400μA
I
O
= 20μA
Fig.9 High Level Output Voltage vs.
Ambient Temperature
Fig.10 Low Level Output Voltage vs.
Ambient Temperature
8
Sheet No.: D2-A08602EN
PC412S0NIP0F Series
Fig.11 Rise Time/Fall Time vs.
Ambient Temperature
Fig.12 Propagation Delay Time vs.
Ambient Temperature
Fig.13 Pulse Width Distortion vs.
Ambient Temperature
Fig.14 Propagation Delay Time vs.
Output Load Capacitance
Fig.15 Pulse Width Distortion vs.
Output Lood Capacitance
Risetime tr / Fall time tf (ns)
Ambient temperature T
a
(C)
0
1
2
3
4
5
6
−40 −200 20406080
V
CC1
=V
CC2
=5V
C
L
=15pF
Propagation delay time t
PHL
/t
PLH
(ns)
Ambient temperature T
a
(C)
15
17
19
21
23
25
27
29
−40 −200 20406080
V
CC1
=V
CC2
=5V
C
L
=15pF
t
PHL
t
PLH
Pulse width distortion |t
PHL
-t
PLH
| (ns)
Ambient temperature T
a
(C)
−2
−1
0
1
2
−40 −200 20406080
V
CC1
=V
CC2
=5V
C
L
=15pF
Propagation delay time t
PHL
/t
PLH
(ns)
Output load capacitance C
L
(pF)
15
17
19
21
23
25
27
29
15 20 25 30 35 40 45 50
V
CC1
=V
CC2
=5V
t
PHL
t
PLH
Pulse width distortion |t
PHL
-t
PLH
| (ns)
Output load capacitance C
L
(pF)
0
1
2
3
4
5
6
15 20 25 30 35 40 45 50
V
CC1
=V
CC2
=5V
Remarks : Please be aware that all data in the
graph are just for reference and not for guarantee.
9
Sheet No.: D2-A08602EN
PC412S0NIP0F Series
■
Design Considerations
●
Recommended operating conditions
Parameter Symbol MIN. TYP. MAX. Unit
Supply voltage V
CC1
4.5
−
5.5 V
Supply voltage V
CC2
4.5
−
5.5 V
Low level input voltage V
IL
0.0
−
0.8 V
High level input voltage V
IH
2.0
−
V
CC1
V
Operating temperature T
opr
−
40
− +
70 ˚C
●
Notes about static electricity
Transistor of detector side in CMOS confi guration may be damaged by static electricity due to its minute
design.
When handling these devices, general countermeasure against static electricity should be taken to avoid
breakdown of devices or degradation of characteristics.
●
Design guide
In order to stabilize power supply line, we should certainly recommend to connect a by-pass capacitor of
0.01
μ
F or more between V
CC1
-GND and V
CC2
-GND near the device.
The detector which is used in this device, has parasitic diode between each pins and GND.
There are cases that miss operation or destruction possibly may be occurred if electric potential of any pin
becomes below GND level even for instant.
Therefore it shall be recommended to design the circuit that electric potential of any pin does not become
below GND level.
This product is not designed against irradiation and incorporates non-coherent LED.
●
Recommended foot print (reference)
(Unit : mm)
1.27
0.64
1.9
7.49
1.271.27
P1-P3P4-P6P7-P9P10-P12P13-P13

PC412S0NIP0F

Mfr. #:
Buy PC412S0NIP0F
Manufacturer:
Sharp Microelectronics
Description:
OPTOISO 3.75KV PUSH PULL 8MFLAT
Lifecycle:
New from this manufacturer.
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