ADP3605 Data Sheet
Rev. B | Page 8 of 12
THEORY OF OPERATION
The ADP3605 uses a switched capacitor principle to generate a
negative voltage from a positive input voltage. An onboard
oscillator generates a 2-phase clock to control a switching
network that transfers charge between the storage capacitors. The
switches turn on and off at a 250 kHz rate, which is generated
from an internal 500 kHz oscillator. The basic principle behind
the voltage inversion scheme is illustrated in Figure 12 and
Figure 13.
Figure 12. ADP3605 Switch Configuration Charging the Pump Capacitor
During phase one, S1 and S2 are on, charging the pump capacitor
to the input voltage. Before the next phase begins, S1 and S2 are
turned off as well as S3 and S4 to prevent any overlap. S3 and S4
are turned on during the second phase (see Figure 13), and the
charge stored in the pump capacitor is transferred to the output
capacitor.
Figure 13. ADP3605 Switch Configuration Charging the Output Capacitor
During the second phase, the positive terminal of the pump
capacitor is connected to ground through the variable resistance
switch (S3), and the negative terminal is connected to the output,
resulting in a voltage inversion at the output terminal. Figure 1
shows the ADP3605 block diagram.
+
V
IN
V
OUT
C
P
C
O
S1
S2
S3
S4
11135-012
+
V
IN
V
OUT
C
P
C
O
S1
S2
S3
S4
11135-013
