Features
8-bit Multiplexed Addresses/Outputs
Fast Read Access Time – 70 ns
Dual Voltage Range Operation
Low-voltage Power Supply Range, 3.0V to 3.6V, or
Standard 5V ± 10% Supply Range
Pin Compatible with Standard AT27C520
Low-power CMOS Operation
20 µA Max Standby for ALE = V
IH
and V
CC
= 3.6V
29 mW Max Active at 5 MHz for V
CC
= 3.6V
JEDEC Standard Packages
20-lead TSSOP
20-lead SOIC
High-reliability CMOS Technology
2,000V ESD Protection
200 mA Latch-up Immunity
Rapid Programming Algorithm – 50 µs/Byte (Typical)
CMOS- and TTL-compatible Inputs and Outputs
JEDEC Standard for LVTTL
Integrated Product Identification Code
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option
1. Description
The AT27LV520 is a low-power, high-performance, 524,288-bit one-time programma-
ble read-only memory (OTP EPROM) organized 64K by eight bits. It incorporates
latches for the eight lower order address bits to multiplex with the eight data bits. This
minimizes system chip count, reduces cost, and simplifies the design of multiplexed
bus systems. It requires only one power supply in the range of 3.0V to 3.6V for normal
read mode operation, making it ideal for fast, portable systems using battery power.
Any byte can be accessed in less than 70 ns.
The AT27LV520 is available in 20-lead TSSOP and 20-lead SOIC, one-time program-
mable (OTP) plastic packages.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3.3V supply. At V
CC
= 3.0V, any byte can be
accessed in less than 70 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
CC
= 3.3V, the AT27LV520 consumes less than one fifth the power of a standard
5V EPROM. Standby mode is achieved by asserting ALE high. Standby mode supply
current is typically less than 1 µA at 3.3V.
The AT27LV520 operating with V
CC
at 3.0V produces TTL level outputs that are com-
patible with standard TTL logic devices operating at V
CC
= 5.0V. The device is also
capable of standard 5-volt operation making it ideally suited for dual supply range
systems or card products that are pluggable in both 3-volt and 5-volt hosts.
512K (64K x 8)
Multiplexed
Addresses/
Outputs
Low-voltage
OTP EPROM
AT27LV520
Not Recommended
for New Designs.
0911G–EPROM–8/07
2
0911G–EPROM–8/07
AT27LV520
Atmel’s AT27LV520 has additional features to ensure high quality and efficient production use.
The Rapid Programming Algorithm reduces the time required to program the part and guaran-
tees reliable programming. Programing time is typically only 50 µs/byte. The Integrated Product
Identification Code electronically identifies the device and manufacturer. This feature is used by
industry-standard programming equipment to select the proper programming algorithms and
voltages. The AT27LV520 programs exactly the same way as a standard 5V AT27C520 and
uses the same programming equipment.
2. Pin Configurations
2.1 20-lead TSSOP Top View
2.2 20-lead SOIC Top View
Pin Name Function
A8 - A15 Addresses
AD0 - AD7 Addresses/Outputs
OE
/VPP Output Enable/Program Supply
ALE Address Latch Enable
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A10
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
A9
A8
AD1
AD3
AD5
AD7
GND
AD6
AD4
AD2
AD0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE/VPP
A15
A13
A11
A9
AD0
AD2
AD4
AD6
GND
VCC
ALE
A14
A12
A10
A8
AD1
AD3
AD5
AD7
3
0911G–EPROM–8/07
AT27LV520
3. System Considerations
Switching under active conditions may produce transient voltage excursions. Unless accommo-
dated by the system design, these transients may exceed datasheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic
capacitor should be utilized for each device. This capacitor should be connected between the
V
CC
and Ground terminals of the device, as close to the device as possible. Additionally, to sta-
bilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk
electrolytic capacitor should be utilized, again connected between the V
CC
and Ground termi-
nals. This capacitor should be positioned as close as possible to the point where the power
supply is connected to the array.
4. Block Diagram
Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
OE, ALE, AND
PROGRAM LOGIC
Y DECODER
X DECODER
Y-GATING
CELL MATRIX
IDENTIFICATION
OUTPUT
BUFFERS
VCC
GND
OE/VPP
LATCHES
ALE
AD7 - AD0
A15 - A8
8
8
5. Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)

AT27LV520-70XI

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
EPROM 512Kb (64Kx8) OTP 3V 70ns
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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