8
0911G–EPROM–8/07
AT27LV520
Notes: 1. V
CC
must be applied simultaneously or before OE/V
PP
and removed simultaneously or after OE/V
PP
.
2. Program Pulse width tolerance is 50
µsec ± 5%.
3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven –
see timing diagram.
Note: 1. The AT27LV520 has the same product identification code as the AT27C520. Both are programming compatible.
16. AC Programming Characteristics
T
A
= 25 ± 5° C, V
CC
= 6.5 ± 0.25V, OE/V
PP
= 13.0 ± 0.25V
Symbol Parameter
(1)
Test Conditions
Limits
UnitsMin Max
t
ALE
Address Latch Enable Width
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
Input Timing Reference Level:
0.8V to 2.0V
Output Timing Reference Level:
0.8V to 2.0V
500 ns
t
LAS
Latched Address Setup Time 100 ns
t
LAH
Latched Address Hold Time 100 ns
t
LP
ALE Low to OE/V
PP
High Voltage Delay 2 µs
t
OES
OE/V
PP
Setup Time 2 µs
t
OEH
OE/V
PP
Hold Time 2 µs
t
DS
Data Setup Time 2 µs
t
DH
Data Hold Time 2 µs
t
PW
ALE Program Pulse Width
(2)
47.5 52.5 µs
t
VR
OE/V
PP
Recovery Time 2 µs
t
VCS
V
CC
Setup Time 2 µs
t
OE
Data Valid from OE/V
PP
150 ns
t
DFP
OE/V
PP
High to Output Float Delay
(3)
0130ns
t
AS
Address Setup Time 2 µs
t
AH
Address Hold Time 0 µs
t
PRT
OE/V
PP
Pulse Rise Time During
Programming
50 ns
17. Atmel’s AT27LV520 Integrated Product Identification Code
Codes
Pins
Hex
DataA8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Manufacturer 0000111101E
Device Type 1100111019D
