AT49BV322A-70TI Datasheet AT49BV322A-70TI, AT49BV322AT-70TI, AT49BV322A-70TU | P7-P9

3308J–FLASH–4/05

AT49BV322A(T)

4.7.3 Erase/Program Status Bit

The device offers a status bit on I/O5, which indicates whether the program or erase operation

has exceeded a specified internal pulse count limit. If the status bit is a “1”, the device is unable

to verify that an erase or a byte/word program operation has been successfully performed. If a

program (Sector Erase) command is issued to a protected sector, the protected sector will not

be programmed (erased). The device will go to a status read mode and the I/O5 status bit will be

set high, indicating the program (erase) operation did not complete as requested. Once the

erase/program status bit has been set to a “1”, the system must write the Product ID Exit com-

mand to return to the read mode. The erase/program status bit is a “0” while the erase or

program operation is still in progress. Please see “Status Bit Table” on page 12 for more details.

4.7.4 VPP Status Bit

The AT49BV322A(T) provides a status bit on I/O3, which provides information regarding the

voltage level of the VPP pin. During a program or erase operation, if the voltage on the VPP pin

is not high enough to perform the desired operation successfully, the I/O3 status bit will be a “1”.

Once the V

status bit has been set to a “1”, the system must write the Product ID Exit com-

mand to return to the read mode. On the other hand, if the voltage level is high enough to

perform a program or erase operation successfully, the V

status bit will output a “0”. Please

see “Status Bit Table” on page 12 for more details.

4.8 Sector Lockdown

Each sector has a programming lockdown feature. This feature prevents programming of data in

the designated sectors once the feature has been enabled. These sectors can contain secure

code that is used to bring up the system. Enabling the lockdown feature will allow the boot code

to stay in the device while data in the rest of the device is updated. This feature does not have to

be activated; any sector’s usage as a write-protected region is optional to the user.

At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific sector, the

six-bus cycle Sector Lockdown command must be issued. Once a sector has been locked down,

the contents of the sector is read-only and cannot be erased or programmed.

4.8.1 Sector Lockdown Detection

A software method is available to determine if programming of a sector is locked down. When

the device is in the software product identification mode (see “Software Product Identification

Entry/Exit” sections on page 26), a read from address location 00002H within a sector will show

if programming the sector is locked down. If the data on I/O0 is low, the sector can be pro-

grammed; if the data on I/O0 is high, the program lockdown feature has been enabled and the

sector cannot be programmed. The software product identification exit code should be used to

return to standard operation.

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AT49BV322A(T)

4.8.2 Sector Lockdown Override

The only way to unlock a sector that is locked down is through reset or power-up cycles. After

power-up or reset, the content of a sector that is locked down can be erased and reprogrammed.

4.9 Erase Suspend/Erase Resume

The Erase Suspend command allows the system to interrupt a sector or chip erase operation

and then program or read data from a different sector within the memory. After the Erase Sus-

pend command is given, the device requires a maximum time of 15 µs to suspend the erase

operation. After the erase operation has been suspended, the system can then read data or pro-

gram data to any other sector within the device. An address is not required during the Erase

Suspend command. During a sector erase suspend, another sector cannot be erased. To

resume the sector erase operation, the system must write the Erase Resume command. The

Erase Resume command is a one-bus cycle command. The device also supports an erase sus-

pend during a complete chip erase. While the chip erase is suspended, the user can read from

any sector within the memory that is protected. The command sequence for a chip erase sus-

pend and a sector erase suspend are the same.

4.10 Program Suspend/Program Resume

The Program Suspend command allows the system to interrupt a programming operation and

then read data from a different byte/word within the memory. After the Program Suspend com-

mand is given, the device requires a maximum of 20 µs to suspend the programming operation.

After the programming operation has been suspended, the system can then read data from any

other byte/word that is not contained in the sector in which the programming operation was sus-

pended. An address is not required during the program suspend operation. To resume the

programming operation, the system must write the Program Resume command. The program

suspend and resume are one-bus cycle commands. The command sequence for the erase sus-

pend and program suspend are the same, and the command sequence for the erase resume

and program resume are the same.

4.11 Product Identification

The product identification mode identifies the device and manufacturer as Atmel. It is accessed

using a software operation.

For details, see “Operating Modes” on page 19 or “Software Product Identification Entry/Exit”

sections on page 26.

4.12 128-bit Protection Register

The AT49BV322A(T) contains a 128-bit register that can be used for security purposes in sys-

tem design. The protection register is divided into two 64-bit blocks. The two blocks are

designated as block A and block B. The data in block A is non-changeable and is programmed

at the factory with a unique number. The data in block B is programmed by the user and can be

locked out such that data in the block cannot be reprogrammed. To program block B in the pro-

tection register, the four-bus cycle Program Protection Register command must be used as

shown in the “Command Definition Table” on page 13. To lock out block B, the four-bus cycle

Lock Protection Register command must be used as shown in the “Command Definition Table” .

Data bit D1 must be zero during the fourth bus cycle. All other data bits during the fourth bus

cycle are don’t cares. To determine whether block B is locked out, the Product ID Entry com-

mand is given followed by a read operation from address 80H. If data bit D1 is zero, block B is

locked. If data bit D1 is one, block B can be reprogrammed. Please see the “Protection Register

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AT49BV322A(T)

Addressing Table” on page 14 for the address locations in the protection register. To read the

protection register, the Product ID Entry command is given followed by a normal read operation

from an address within the protection register. After determining whether block B is protected or

not, or reading the protection register, the Product ID Exit command must be given prior to per-

forming any other operation.

4.13 RDY/BUSY

An open-drain READY/BUSY output pin provides another method of detecting the end of a pro-

gram or erase operation. RDY/BUSY

is actively pulled low during the internal program and erase

cycles and is released at the completion of the cycle. The open-drain connection allows for OR-

tying of several devices to the same RDY/BUSY

line. Please see “Status Bit Table” on page 12

for more details.

4.14 Common Flash Interface (CFI)

CFI is a published, standardized data structure that may be read from a flash device. CFI allows

system software to query the installed device to determine the configurations, various electrical

and timing parameters, and functions supported by the device. CFI is used to allow the system

to learn how to interface to the flash device most optimally. The two primary benefits of using

CFI are ease of upgrading and second source availability. The command to enter the CFI Query

mode is a one-bus cycle command which requires writing data 98h to address 55h. The CFI

Query command can be written when the device is ready to read data or can also be written

when the part is in the product ID mode. Once in the CFI Query mode, the system can read CFI

data at the addresses given in “Common Flash Interface Definition Table” on page 27. To exit

the CFI Query mode, the product ID exit command must be given.

4.15 Hardware Data Protection

The Hardware Data Protection feature protects against inadvertent programs to the

AT49BV322A(T) in the following ways: (a) V

sense: if V

is below 1.8V (typical), the program

function is inhibited. (b) V

power-on delay: once V

has reached the V

sense level, the

device will automatically time out 10 ms (typical) before programming. (c) Program inhibit: hold-

ing any one of OE

low, CE high or WE high inhibits program cycles. (d) Program inhibit: V

less than V

ILPP

. (e) V

power-on delay: once V

has reached 1.65V, program and erase oper-

ations are inhibited for 100 ns.

4.16 Input Levels

While operating with a 2.65V to 3.6V power supply, the address inputs and control inputs (OE,

and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the

device. The I/O lines can only be driven from 0 to V

+ 0.6V.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P32

AT49BV322A-70TI

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