2004 Oct 15 2
Philips Semiconductors Product specification
3.3 V 32-bit edge-triggered D-type flip-flop;
3-state
74LVT32374
FEATURES
• 32-bit edge-triggered flip-flop
• 3-state buffers
• Output capability: +64 mA/−32 mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5 V
supply
• Bus-hold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• Power-up reset
• Power-up 3-state
• No bus current loading when output is tied to 5 V bus
• Latch-up protection exceeds 500 mA in accordance with
JEDEC std 17
• ESD protection exceeds 2000 V in accordance with
MIL STD 883 method 3015 and 200 V in accordance
with machine model.
DESCRIPTION
The 74LVT32374 is a high-performance BICMOS product
designed for V
CC
operation at 3.3 V.
The 74LVT32374 is a 32-bit edge-triggered D-type flip-flop
featuring non-inverting 3-state outputs. The device can be
used as four 8-bit flip-flops, or two 16-bit flip-flops or one
32-bit flip-flop. On the positive transition of the clock (CP),
the Q outputs of the flip-flop take on the logic levels set-up
at the D inputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; t
r
=t
f
≤ 2.5 ns.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
t
PHL
/t
PLH
propagation delay nCP to nQ
n
C
L
= 50 pF; V
CC
= 3.3 V 2.9 ns
C
I
input capacitance V
I
= 0 V or 3.0 V 3 pF
C
O
output capacitance outputs disabled; V
O
= 0 V or 3.0 V 9 pF
I
CCZ
total supply current output disabled; V
CC
= 3.6 V 140 µA
