SSM2517 Data Sheet
Rev. B | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 4.
Parameter Rating
PVDD Supply Voltage −0.3 V to +6 V
VDD Supply Voltage −0.3 V to +3.6 V
Input Voltage (Signal Source) −0.3 V to +3.6 V
ESD Susceptibility 4 kV
OUT− and OUT+ Pins 8 kV
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Junction-to-air thermal resistance (θ
JA
) is specified for the worst-
case conditions, that is, a device soldered in a printed circuit board
(PCB) for surface-mount packages. θ
JA
and θ
JB
(junction-to-board
thermal resistance) are determined according to JEDEC JESD51-9
on a 4-layer PCB with natural convection cooling.
Table 5. Thermal Resistance
Package Type PCB θ
JA
θ
JB
Unit
9-Ball, 1.5 mm × 1.5 mm WLCSP 1S0P 162 39 °C/W
2S0P 76 21 °C/W
ESD CAUTION
Data Sheet SSM2517
Rev. B | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
09211-003
BALL
A
1
CORNER
A
321
B
C
OUT+ PGNDPVDD
OUT– LRSEL VDD
PCLK PDAT GAIN_FS
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Function Description
A1 OUT+ Output Noninverting Output.
A2 PVDD Supply Amplifier Power, 2.5 V to 5.5 V.
A3 PGND Ground Amplifier Ground.
B1 OUT− Output Inverting Output.
B2 LRSEL Input Left/Right Channel Select. Pull up to VDD for right channel; tie to ground for left channel.
B3 VDD Supply Digital Power, 1.62 V to 3.6 V.
C1 PCLK Input PDM Interface Master Clock.
C2 PDAT Input PDM Data Signal.
C3 GAIN_FS Input Gain and Sample Rate Selection Pin.
SSM2517 Data Sheet
Rev. B | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
100
10
1
0.1
0.01
0.001 0.01 0.1 1 10
THD + N (%)
OUTPUT POWER (W)
09211-010
R
L
= 8 + 33µH
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
Figure 4. THD + N vs. Output Power into 8 Ω, Gain = 5 V, f
S
= 64×
100
10
1
0.1
0.01
0.001 0.01 0.1 1 10
THD + N (%)
OUTPUT POWER (W)
09211-012
R
L
= 8 + 33µH
GAIN = 3.6V
SAMPLE RATE = 64×
(3.072MHz)
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
Figure 5. THD + N vs. Output Power into 8 Ω, Gain = 3.6 V, f
S
= 64×
100
10
1
0.1
0.01
0.001 0.01 0.1 1 10
THD + N (%)
OUTPUT POWER (W)
09211-014
R
L
= 4 + 15µH
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
PVDD = 2.5V
PVDD = 5V
PVDD = 3.6V
Figure 6. THD + N vs. Output Power into 4 Ω, Gain = 5 V, f
S
= 64×
100
10
1
0.1
0.01
0.001 0.01 0.1 1 10
THD + N (%)
OUTPUT POWER (W)
09211-011
R
L
= 8 + 33µH
GAIN = 5V
SAMPLE RATE = 12
(6.144MHz)
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
Figure 7. THD + N vs. Output Power into 8 Ω, Gain = 5 V, f
S
= 128×
100
10
1
0.1
0.01
0.001 0.01 0.1 1 10
THD + N (%)
OUTPUT POWER (W)
09211-013
R
L
= 8 + 33µH
GAIN = 3.6V
SAMPLE RATE = 12
(6.144MHz)
PVDD = 2.5V
PVDD = 5V
PVDD = 3.6V
Figure 8. THD + N vs. Output Power into 8 Ω, Gain = 3.6 V, f
S
= 128×
100
10
1
0.1
0.01
0.001 0.01 0.1 1 10
THD + N (%)
OUTPUT POWER (W)
09211-015
R
L
= 4 + 15µH
GAIN = 5V
SAMPLE RATE = 12
(6.144MHz)
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
Figure 9. THD + N vs. Output Power into 4 Ω, Gain = 5 V, f
S
= 128×

SSM2517CBZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio Amplifiers Digital PDM-Input Mono 2.5W Class-D
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet