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Pin configuration STCCP27A
6/19
Table 2. Main function table
Z = High Impedance, L = Low Voltage Level, H = High Voltage Level, X = Don’t care
Table 3. I
2
C Bus function table
Open: If I/O
VDD
is not driven then the I/O
VL
will go in high level V
L
by embedded 10kΩ pull-up resistor; If I/O
VL
is not driven then the I/O
VCC
will go in high level V
DD
by embedded 10KΩ pull-up resistor
Input Output
Function
Enable SYNC_SEL D+ D- CLK+ CLK- V-SYNC H-SYNC D1-D8 CLK
L X XXXX L L L L CCP disabled
HHSOF (FF
H
00
H
00
H
02
H
)H H
See detailed
timing diagram
Start of frame
H H EOF(FF
H
00
H
00
H
03
H
) L L End of frame
HHSOL(FF
H
00
H
00
H
00
H
) No change H Start of line
HHEOL(FF
H
00
H
00
H
01
H
) No change L End of line
H L XXXX L L D+, D-
See
detailed
timing
diagram
Disabled sync
(D1-D8 will get out
data, including
sync code)
Enable
I/O Input
Function
I/O
VDD
I/O
VL
XLLI
2
C Comm.
XV
DD
V
L
I
2
C Comm.
XOpenV
L
I
2
C Comm.
XV
DD
Open I
2
C Comm.
Figure 5. Frame structure In VGA case (allowed synchronization codes sequence)
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