74HC237_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 14 January 2013 7 of 16
NXP Semiconductors
74HC237-Q100
3-to-8 line decoder, demultiplexer with address latches
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 9.
Symbol Parameter Conditions T
amb
= 25 C T
amb
= 40 C
to +85 C
T
amb
= 40 C
to +125 C
Unit
Min Typ Max Min Max Min Max
t
pd
propagation
delay
An to Yn; see Figure 6
[1]
V
CC
= 2.0 V - 52 160 - 200 - 240 ns
V
CC
= 4.5 V - 19 32 - 40 - 48 ns
V
CC
=5V; C
L
=15pF - 16 - - - - - ns
V
CC
= 6.0 V - 15 27 - 34 - 41 ns
LE
to Yn; see Figure 6
[1]
V
CC
= 2.0 V - 61 190 - 240 - 285 ns
V
CC
= 4.5 V - 22 38 - 48 - 57 ns
V
CC
=5V; C
L
=15pF - 19 - - - - - ns
V
CC
= 6.0 V - 18 32 - 41 - 48 ns
E
1to Yn; see Figure 7
[1]
V
CC
= 2.0 V - 47 145 - 180 - 220 ns
V
CC
= 4.5 V - 17 29 - 36 - 44 ns
V
CC
=5V; C
L
=15pF - 14 - - - - - ns
V
CC
= 6.0 V - 14 25 - 31 - 38 ns
E2 to Yn; see Figure 6
[1]
V
CC
= 2.0 V - 47 145 - 180 - 220 ns
V
CC
= 4.5 V - 17 29 - 36 - 44 ns
V
CC
=5V; C
L
=15pF - 14 - - - - - ns
V
CC
= 6.0 V - 14 25 - 31 - 38 ns
t
t
transition
time
Yn; see Figure 6 and
Figure 7
[2]
V
CC
= 2.0 V - 19 75 - 95 - 110 ns
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
V
CC
= 6.0 V - 6 13 - 16 - 19 ns
t
W
pulse width LE HIGH; see Figure 8
V
CC
= 2.0 V 50 11 - 65 - 75 - ns
V
CC
= 4.5 V 10 4 - 13 - 15 - ns
V
CC
= 6.0 V 9 3 - 11 - 13 - ns
t
su
set-up time An to LE; see Figure 8
V
CC
= 2.0 V 50 6 - 65 - 75 - ns
V
CC
= 4.5 V 10 2 - 13 - 15 - ns
V
CC
= 6.0 V 9 2 - 11 - 13 - ns