1997 Oct 21 16
Philips Semiconductors Product specification
I
2
C-bus controller
PCF8584
Fig.6 PCF8584 master transmitter mode.
h
andbook, full pagewidth
START
read byte from S1 register
END
A0 = HIGH
is bus busy?
(BB = 0?)
yes
no
PIN bit = 0?
no
yes
slave
acknowledged?
(LRB = 0?)
yes
send byte 'slave address'
A0 = LOW
send C5H to control
register S1
Load 'slave address' into S0 register:
'slave address' = value of slave address
(7-bits + R/W = 0). After reset, default = '0'
n = 0 (data byte counter);
m = number of data bytes
to be transferred
read byte from S1 register
n = m
no
n = n + 1
send byte 'data'
yes
A0 = HIGH
PCF8584 remains in
master transmitter
mode if R/W bit of
'slave address' = 0
A0 = HIGH
A0 = LOW
Load 'data'
into bus
buffer register S0;
data is transmitted.
send byte C3H
transmission
completed
A0 = HIGH
Load C3 into the S1 control
register: PCF8584 generates
'STOP' condition.
PCF8584 goes into
slave receiver mode
Load C5H into S1. 'C5H' = PCF8584 generates
the 'START' condition and clocks out the slave
address and the clock pulse for slave acknowledgement.
Next byte(s) sent to the S0 register will be immediately
transferred over the I
2
C-bus.
Poll for transmission finished.
MBE715
1997 Oct 21 17
Philips Semiconductors Product specification
I
2
C-bus controller
PCF8584
Fig.7 PCF8584 master receiver mode.
(1) The first read of the S0 register is a ‘dummy read’ of the slave address which should be discarded. The first read of the S0 register simultaneously
reads the current value of S0 and then transfers the first valid data byte from the I
2
C-bus to S0.
handbook, full pagewidth
A0 = LOW
Load 'Slave Address' into S0 register:
'Slave Address' = 7 bits + R/W = 1.
Is the I
2
C-bus busy?
PCF8584 generates 'START' condition,
sends out slave address + RD to I
2
C-bus and
generates 9th clock pulse for slave ACK.
Set-up software counters.
Set ACK bit S1 to 0 in
preparation for negative
acknowledgement.
PCF8584 generates
'STOP' condition.
PCF8584 goes into
slave receiver mode.
This command transfers
the final data byte from
the data buffer to accumulator.
Because the STOP condition
was previously executed, no
I
2
C-bus activity takes place.
This command simultaneously
receives the final data byte
from the I
2
C-bus and loads
it into register S0.
Neg. ACK is also sent.
is bus busy?
(BB = 0?)
START
END
send byte 'slave address' to S0
A0 = HIGH
read byte from S1 status register
A0 = HIGH
send byte C5H to S1 control register
A0 = HIGH
read byte from S1 status register
A0 = LOW
read data byte from S0 register
(1)
n = n + 1
n = 0 (data byte counter)
m = number of data bytes
to be read
yes
no
A0 = HIGH
send byte 40H to control register S1
A0 = LOW
read data byte from S0 register
(1)
A0 = HIGH
read byte from S1 status register
A0 = HIGH
send byte C3H to S1
A0 = LOW
read final data byte from S0 register
PIN = 0?
no
yes
slave ACK?
(LRB = 0?)
n = m 1?
yes
no no
(an error
has occured)
PIN = 0?
yes
MGL009
1997 Oct 21 18
Philips Semiconductors Product specification
I
2
C-bus controller
PCF8584
Fig.8 Master transmitter followed by repeated START and becoming master receiver.
n
dbook, full pagewidth
START
I
2
C-bus write routine
(master transmitter mode
excluding final STOP)
send byte 45H
send byte 'slave address'
I
2
C-bus read routine (master receiver mode)
END
PCF8584 configured as
master transmitter
PCF8584 configured as
master receiver
A0 = HIGH
A0 = LOW
Load 45H into the S1 register; PCF8584
generates the repeated 'START condition' only.
The current contents of register S0 is NOT
clocked out onto the I
2
C-bus.
The next byte sent to register S0 should be the
'slave address' + read bit.
Load 'slave address' into the S0 register. Once
loaded, it is automatically clocked out over the I
2
C-bus.
'Slave address' = slave address (7 bits) + R/W bit set '1'.
MBE712

PCF8584T/2,518

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
I/O Controller Interface IC PARALLEL TO I2C CONVERTER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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