OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

NTB0104BQ-Q100X

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
NTB0104_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 18 April 2013 16 of 23
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
13.2 Architecture
The architecture of the NTB0104-Q100 is shown in Figure 9. The device does not require
an extra input signal to control the direction of data flow from A to B or from B to A. In a
static state, the output drivers of the NTB0104-Q100 can maintain a defined output level.
However, the output architecture has been designed so that when data on the bus starts
flowing in the opposite direction, an external driver can overdrive the output drivers. The
output one shots detect rising or falling edges on the A or B ports. During a rising edge,
the one-shots turn on the PMOS transistors (T1, T3) for a short duration, accelerating the
low-to-high transition. Similarly, during a falling edge, the one-shots turn on the NMOS
transistors (T2, T4) for a short duration, accelerating the high-to-low transition. During
output transitions, the typical output impedance is 70 at V
CCO
= 1.2 V to 1.8 V, 50 at
V
CCO
= 1.8 V to 3.3 V and 40 at V
CCO
= 3.3 V to 5.0 V.
Fig 9. Architecture of NTB0104-Q100 I/O cell (one channel)
001aal921
ONE
SHOT
ONE
SHOT
ONE
SHOT
ONE
SHOT
B
A
V
CC(B)
V
CC(A)
4 kΩ
4 kΩ
T3
T4
T1
T2
NTB0104_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 18 April 2013 17 of 23
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
13.3 Input driver requirements
For correct operation, the device driving the data I/Os of the NTB0104-Q100 must have a
minimum drive capability of 2 mA. See Figure 10
for a plot of typical input current versus
input voltage.
13.4 Power-up
During operation, V
CC(A)
must never be higher than V
CC(B)
. However, during power-up,
V
CC(A)
V
CC(B)
does not damage the device. This means that either power supply can be
ramped up first. There is no special power-up sequencing required. The NTB0104-Q100
includes circuitry that disables all output ports when either V
CC(A)
or V
CC(B)
is switched off.
13.5 Enable and disable
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state. The disable time (t
dis
with no external
load) indicates the delay between when OE goes LOW and when outputs actually
become disabled. The enable time (t
en
) indicates the amount of time to allow for one
one-shot circuitry to become operational after OE is taken HIGH. To ensure the
high-impedance OFF-state during power-up or power-down, tie pin OE to GND through a
pull-down resistor. The current-sourcing capability of the driver determines the minimum
value of the resistor.
13.6 Pull-up or pull-down resistors on I/O lines
As mentioned previously, the NTB0104-Q100 is designed with low static drive strength to
drive capacitive loads of up to 70 pF. To avoid output contention issues, any pull-up or
pull-down resistor used, must be higher than 50 k. Consequently, the NTB0104-Q100 is
not recommended for use in open-drain driver applications such as 1-Wire or I
2
C. For
these applications, the NTS0104-Q100 level translator is recommended.
V
T
: input threshold voltage of the NTB0104-Q100 (typically V
CCI
/ 2).
V
D
: supply voltage of the external driver.
Fig 10. Typical input current versus input voltage graph
001aal922
V
T
/4 kΩ
−(V
D
− V
T
)/4 kΩ
I
I
V
I
NTB0104_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 18 April 2013 18 of 23
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
14. Package outline
Fig 11. Package outline SOT762-1 (DHVQFN14)
terminal 1
index area
0.51
A
1
E
h
b
UNIT
ye
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
3.1
2.9
D
h
1.65
1.35
y
1
2.6
2.4
1.15
0.85
e
1
2
0.30
0.18
0.05
0.00
0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT762-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT762-1
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
26
13
9
8
7
1
14
X
D
E
C
B
A
02-10-17
03-01-27
terminal 1
index area
AC
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

NTB0104BQ-Q100X

Mfr. #:
Buy NTB0104BQ-Q100X
Manufacturer:
NXP Semiconductors
Description:
Translation - Voltage Levels Dual supply translating transcvr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet