18
LTC1923
1923f
APPLICATIO S I FOR ATIO
WUUU
In this application, the bridge supply voltage, oscillator
frequency and external filter components determine the
amount of ripple current that flows through the TEC.
Higher valued filter components reduce the amount of
ripple current through the TEC at the expense of increased
board area. Filter capacitor ESR along with inductor ripple
current will determine the peak-to-peak voltage ripple
across the TEC and therefore the ripple current since the
TEC appears resistive.
The ripple current through the TEC, I
TEC(RIPPLE)
, is
approximately equal to:
I
VV
fLCRV
V V ESR
fLV R
TEC RIPPLE
BRIDGE TEC
OSC TEC BRIDGE
BRIDGE TEC
OSC BRIDGE TEC
()
–
•••••
–•
••• •
≅
+
()
22
2
22
16
2
where:
f
OSC
= the oscillator frequency
L = the filter inductor value
C = the filter capacitor value
R
TEC
= the resistance of the TEC
V
TEC
= the DC voltage drop across the TEC
ESR = the equivalent series resistance of the filter
capacitor
V
BRIDGE
= the full-bridge supply voltage typically equal
to V
DD
The equation above shows that there are two components,
which comprise TEC ripple current. The first term is the
increase in voltage from the charging of the filter capaci-
tor. The second term is due to the filter capacitor ESR and
is typically the dominant contributor. Therefore the filter
capacitor selected wants to have a low ESR. This capacitor
can be made of multilevel ceramic, OS-CON electrolytic or
other suitable capacitor. Increasing the oscillator fre-
quency will also reduce the TEC ripple current since both
terms have an inverse relationship to operating frequency.
Example: V
BRIDGE
= 5V, R
TEC
= 2.5Ω, V
TEC
= 2.5V,
L = 22µH, C = 22µF, f
OSC
= 250kHz, ESR = 100mΩ
I
TEC(RIPPLE)
= 3.1mA + 13.6mA = 16.7mA
For this example the DC current flowing through the TEC
is 1A, making the ripple current equal to approximately 1.7%
(this illustrates why I
TEC
can be approximated to be DC).
Closing the Feedback Loop
Closing the feedback loop around the TEC and thermistor
(or other temperature sensitive element) involves identify-
ing where the thermal system’s poles are located and
placing electrical pole(s) (and zeroes) to stabilize the
control loop. High DC loop gain is desirable to keep
extremely tight control on the system temperature. Unfor-
tunately the higher the desired loop gain, the larger the
compensation values required to stabilize the system.
Given the inherently slow time constants associated with
thermal systems (on the order of many seconds), this can
lead to unreasonably large component values. Therefore,
the amount of loop gain necessary to maintain the desired
temperature accuracy should be calculated, and after
adding some margin, this should be the target DC loop
gain for the system. A block diagram of the system is
shown in Figure 11. The gain blocks are as follows:
K
IA
= instrumentation amplifier gain (V/V)
K
EA
= error amplifier gain (V/V)
K
MOD
= modulator gain (d/V)
K
PWR
= power stage gain (V/d)
K
TEC
= TEC gain (°C/V)
K
THRM
= Thermistor Gain (V/°C)
K
IA
and K
EA
are the electrical gains associated with the
instrumentation and LTC1923 error amplifier. Switching
regulators are sampled systems that convert voltage to
duty cycle (d), which explains why the K
MOD
and K
PWR
gain terms are expressed as a function of duty cycle and
voltage. The TEC converts voltage to temperature change,
while the thermistor’s impedance and therefore voltage
across it changes with temperature.
The loop gain can be expressed by the following equation:
T (loop gain) = K
IA
• K
EA
• K
MOD
• K
PWR
• K
TEC
• K
THRM
And the error introduced by the finite gain of the system,
V
E
, can be expressed by:
V
E
= V
IN
/(1 + T)
