6N135, 6N136
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Vishay Semiconductors
Rev. 1.9, 02-Nov-15
8
Document Number: 83604
For technical questions, contact: optocoupleranswers@vishay.com
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DIP-8, Option 9
PACKAGE MARKING
Fig. 12 - 6N135 Fig. 13 - 6N136
Notes
• The VDE logo is only marked on option 1 parts.
• Tape and reel suffix (T) is not part of the package marking.
SOLDER PROFILES
Fig. 14 - Wave Soldering Double Wave Profile According to
J-STD-020 for DIP-8 Devices
Fig. 15 - Lead (Pb)-free Reflow Solder Profile According to
J-STD-020 for SMD-8 Devices
PIN ONE I.D.
12 34
7865
10.16 max.
9.75 ± 0.15
1.27 ± 0.10
2.54 nom.
3 x 2.54 = 7.62
3.55 ± 0.20
0.95 ± 0.20
Leads coplanarity
0.10 max.
7.62 typ.
8.00 min.
6.70 ± 0.15
0.25 ± 0.10
0.75 ± 0.20
9.78 ± 0.25
0.18 ± 0.08
R0.250
2.54
0.76
1.78
1.52
11.05
8.00 min.
Recommended Footprint
2 K/s
second
wave
first wave
wave
ca. 5 K/s
5 s
full line: typical
dotted line:
process limits
Time (s)
Temperature (°C)
300
250
200
150
100
50
0
050100
150 200 250
94 8626
Lead temperature
235 °C to
260 °C
100 °C to
130 °C
ca. 200 K/s
forced cooling
ca. 2 K/s
0
50
100
150
200
250
300
0 50 100 150 200 250 300
Time (s)
Temperature (°C)
240 °C
245 °C
max. 260 °C
max. 120 s
max. 100 s
217 °C
max. 30 s
max. ramp up 3 °C/s
max. ramp down 6 °C/s
19841
255 °C
