CP2112
Rev. 1.2 19
Alternatively, if 3.0 to 3.6 V power is supplied to the V
DD
pin, the CP2112 can function as a USB self-powered
device with the voltage regulator bypassed. For this configuration, tie the REGIN input to V
DD
to bypass the voltage
regulator. A typical connection diagram showing the device in a self-powered application with the regulator
bypassed is shown in Figure 11.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
the CP2112_SetIDs software included with the CP2112 Software Development Kit (SDK) for information on how to
customize USB descriptors for the CP2112.
Figure 11. Typical Self-Powered Connection Diagram (Regulator Bypass)
Note 3
Note 2
Note 1
VBUS
D+
D-
GND
USB
Connector
Suspend
Signals
GPIO
Signals
CP2112
GPIO.0
GPIO.1
GPIO.2
GPIO.3
VPP
SUSPEND
SUSPEND
GPIO.4
GPIO.5
GPIO.8
GPIO.6
GPIO.7
VDD
REGIN
GND
VIO
VBUS
D+
D-
RST
0.1 F1-5 F
VIO
4.7 k
Note 4
Note 1 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
Note 2 : An external pull-up is not required, but can be added for noise immunity.
Note 3 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
voltage.
Note 4 : If programming the configuration ROM via USB, add a 4.7 F capacitor between VPP
and ground. During a programming operation, do not connect the VPP pin to other
circuitry, and ensure that VDD is at least 3.3 V.
Note 5 : For self-powered systems where VDD and VIO may be unpowered when VBUS is connected
to 5 V, a resistor divider (or functionally-equivalent circuit) on VBUS is required to meet the
absolute maximum voltage on VBUS specification in the Electrical Characteristics section.
4.7 F
3.3 V
Power
To
SMBus
Slave
Devices
SDA
SCL
47 k
24 k
Note 5
(Optional)
CP2112
20 Rev. 1.2
10. CP2112 Interface Specification and Windows Interface DLL
The CP2112 is a USB Human Interface Device (HID), and, since most operating systems include native drivers,
custom drivers do not need to be installed. Because the CP2112 does not fit a standard HID device type, such as a
keyboard or mouse, any CP2112 PC application needs to use the CP2112’s HID specification to communicate with
the device. The low-level HID specification for the CP2112 is provided in “AN495: CP2112 Interface Specification”.
This document describes all of the basic functions for opening, reading from, writing to, and closing the device, as
well as the ROM programming functions.
A Windows DLL that encapsulates the CP2112 HID interface and also adds higher level features, such as read/
write timeouts is provided by Silicon Labs. This DLL is the recommended interface for the CP2112. The Windows
DLL is documented in CP2112 Windows DLL Specification.
Both of these documents and the DLL are available in the CP2112EK CD as well as online at www.silabs.com.
11. Relevant Application Notes and Software
The following Application Notes are applicable to the CP2112. The latest versions of these application notes and
their accompanying software are available at www.silabs.com/interface-appnotes.
AN495: CP2112 Interface Specification—describes how to interface to the CP2112 using the low-level, HID
Interface.
AN496: CP2112 HID USB-to-SMBus API Specification—describes how to interface to the CP2112 using the
Windows Interface DLL.
The CP2112 Software Development Kit can be downloaded from www.silabs.com/interface-software. See the
CP2112_SetIDs software included with the CP2112 Software Development Kit (SDK) for information on how to
customize USB descriptors for the CP2112.
12. Device Specific Behavior
This section describes differences in behavior between the CP2112-F01-GM and the CP2112-F02-GM. The
revision of the CP2112 can be read by using the Get Version Information command (Report ID 0x05) or by
connecting to a CP2112 device using the HidSmbus Example application. The part number will always be 0x0C
(specifying the CP2112 as the device) and the device version will be the revision of the device.
12.1. Addressed Read Requests
In F01 devices, addressed read requests are performed by issuing a start on the bus, followed by a slave address
(write), logical address to read, stop, start, and slave address (read).
F02 devices handle addressed read requests by issuing a start on the bus, followed by a slave address (write),
logical address to read, repeated start, and slave address (read).
12.2. Multimaster Applications
F01 devices can hold the SDA line low for approximately 3 ms if the Set SMBus Configuration command (Report
ID 0x06) is received by one CP2112 master during the middle of a separate master device's transaction. A fix is
implemented on F02 devices to eliminate this behavior.
CP2112
Rev. 1.2 21
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.5
Updated Table 3 on page 6.
Updated Table 4 on page 6.
Updated Table 5 on page 6.
Updated Table 11 on page 17.
Revision 0.5 to Revision1.0
Removed preliminary language.
Revision 1.0 to Revision 1.1
Updated ordering part number.
Updated "6.2. SMBus Operation" on page 14 to
describe SMBus transactions supported by CP2112.
Updated Figure 6 and added Figures 7 and 8.
Added "12. Device Specific Behavior" on page 20.
Revision 1.1 to Revision 1.2
Added a row for VBUS in Table 1, “Absolute
Maximum Ratings,” on page 5.
Added V
DD
Ramp Time for Power On specification
to Table 4, “Reset Electrical Characteristics,” on
page 6.
Added V
PP
Voltage and Capacitor specifications to
Table 2, “Global DC Electrical Characteristics,” on
page 5.
Removed AN144 references.
Added references to the CP2112_SetIDs software
and CP2112 SDK.
Updated "9. Voltage Regulator" on page 18 to add
absolute maximum voltage on VBUS requirements
in self-powered systems.

CP2112-F02-GMR

Mfr. #:
Manufacturer:
Silicon Labs
Description:
USB Interface IC HID USB to SMBUS Bridge QFN24
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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