Emulator Limitations
AVR
®
ATICE30 User Guide 6-3
Note that LPM and ELPM with no operands are not parts of the Enhanced Instruction
Set and will be emulated in real time as long as the Enhanced Instruction Set is not
enabled. In the enhanced AVR architecture the lock and fuse bits may be read using
LPM/ELPM. To achieve this in ICE30, the Enable Enhanced Instruction Set option
must be enabled.
ATmega103/603 does not support the Enhanced Instruction Set.
If ATmega103/603 is emulated and the code contains Enhanced Instruction Set instruc-
tions, emulation will break and a warning box will appear.
Table 6-2. Enhanced Instruction Set
Enhanced Instruction Set
MOVW
LPM Rd,Z
LPM Rd,Z+
ELPM Rd,Z
ELPM Rd,Z+
MUL
MULS
MULSU
FMUL
FMULS
FMULSU
SPM
Emulator Limitations
6-4 AVR
®
ATICE30 User Guide
AVR
®
ATICE30 User Guide 7-1
Section 7
Special Considerations
7.1 ADC The ADC featured in ATmega163/83 is implemented on the ATmega163POD using an
AD converter chip, several analog multiplexers, operational amplifiers to provide 10x
and 200x gain and an instrumentation amplifier to provide differential mode inputs. See
Figure 7-1. Due to this construction with discrete ICs on an open PCB, the ADC will be
more susceptible to ambient noise and have electrical characteristics that differ from the
actual chip. See Table 7-1.
Figure 7-1. ATmega163POD ADC
The internal voltage reference on the pod has a nominal voltage of 2.495V (minimum
2.440V, maximum 2.550V). This is a bit lower than for the actual device, but still within
the specification of ATmega163/83 (minimum 2.40V, maximum 2.70V).
When measuring differential signals, the lowest possible signal is approximately 8 mV.
For any signals below this value, the voltage output of the instrumentation amplifier will
be 8 mV (maximum). When measuring single-ended signals, the instrumentation ampli-
fier is bypassed and the signal may be in the range 0V to V
REF
.
The differential amplifier and gain stages are supplied with 7V on the pod. To protect the
ADC chip from any voltage levels exceeding 5.8V (for instance, when using 200x ampli-
fication and an input signal >29 mV), a clamping diode is coupled to the ADC input pin.
Note: The signal applied to the ADC inputs multiplied with the selected gain (1x, 10x
or 200x) should never exceed 5.5V
DC
.
+
-
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
10x
20x
Instrumentation
Amplifier
Gain Amplifier
Gain
Selection
10-bit ADC A
REF
Int. Ref
A
REF
A
VCC

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