MAX1187BEUI+ Datasheet MAX1187CEUI+, MAX1187BEUI+, MAX1187ACUI+ | P10-P12

MAX1179/MAX1187/MAX1189

Shutdown Mode

In shutdown mode, the reference and reference buffer

shut down between conversions. Shutdown mode

reduces supply current to 0.5µA (typ) immediately after

the conversion. The next falling edge of CS with R/C

low causes the reference and buffer to wake up and

enter acquisition mode. To achieve 16-bit accuracy,

allow 12ms (C

REFADJ

= 0.1µF, C

REF

= 10µF) for the

internal reference to wake up.

Internal and External Reference

Internal Reference

The internal reference of the MAX1179/MAX1187/

MAX1189 is internally buffered to provide +4.096V out-

put at REF. Bypass REF to AGND and REFADJ to

AGND with 10µF and 0.1µF, respectively.

Sink or source current at REFADJ to make fine adjust-

ments to the internal reference. The input impedance of

REFADJ is nominally 5kΩ. Use the circuit of Figure 7 to

adjust the internal reference to ±1.5%.

External Reference

An external reference can be placed at either the input

(REFADJ) or the output (REF) of the MAX1179/

MAX1187/MAX1189’s internal buffer amplifier. Using

the buffered REFADJ input makes buffering the external

reference unnecessary. The input impedance of

REFADJ is typically 5kΩ. The internal buffer output

must be bypassed at REF with a 10µF capacitor.

Connect REFADJ to AV

to disable the internal buffer.

Directly drive REF using an external 3.8V to 4.2V refer-

ence. During conversion, the external reference must

be able to drive 100µA of DC load current and have an

output impedance of 10Ω or less.

For optimal performance, buffer the reference through

an op amp and bypass REF with a 10µF capacitor.

Consider the MAX1179/MAX1187/MAX1189’s equivalent

input noise (0.6LSB) when choosing a reference.

Reading the Conversion Result

EOC flags the microprocessor when a conversion is

complete. The falling edge of EOC signals that the data

is valid and ready to be output to the bus. D0–D15 are

the parallel outputs of the MAX1179/MAX1187/

MAX1189. These three-state outputs allow for direct

connection to a microcontroller I/O bus. The outputs

remain high-impedance during acquisition and conver-

sion. Data is loaded onto the bus with the third falling

edge of CS with R/C high (after t

). Bringing CS high

forces the output bus back to high impedance. The

MAX1179/MAX1187/MAX1189 then wait for the next

falling edge of CS to start the next conversion cycle

(see Figure 2).

16-Bit, 135ksps, Single-Supply ADCs with

Bipolar Analog Input Range

10 ______________________________________________________________________________________

Figure 6. Selecting Shutdown Mode

EOC

REF &

BUFFER

POWER

ACQUISITION CONVERSION

DATA

OUT

R/C

Figure 7. MAX1179/MAX1187/MAX1189 Reference Adjust

Circuit

MAX1179

MAX1187

MAX1189

REFADJ

+5V

68kΩ

100kΩ

150kΩ

0.1µF

Transfer Function

Figures 8, 9, and 10 show the MAX1179/MAX1187/

MAX1189’s output transfer functions. The MAX1179

and MAX1189 outputs are coded in offset binary, while

the MAX1187 is coded in standard binary.

Input Buffer

Most applications require an input buffer amplifier to

achieve 16-bit accuracy and prevent loading the

source. Switch the channels immediately after acquisi-

tion, rather than near the end of or after a conversion

when the input signal is multiplexed. This allows more

time for the input buffer amplifier to respond to a large

step-change in input signal. The input amplifier must

have a high enough slew rate to complete the required

output voltage change before the beginning of the

acquisition time. Figure 11 shows an example of this

circuit using the MAX427.

Figures 12a and 12b show how the MAX1179 and

MAX1189 analog input current varies depending on

whether the chip is operating or powered down. The

part is fully powered down between conversions if the

voltage at R/C is set high during the second falling

edge of CS. The input current abruptly steps to the

powered up value at the start of acquisition. This step

in the input current can disrupt the ADC input, depend-

ing on the driving circuit’s output impedance at high

frequencies. If the driving circuit cannot fully settle by

the end of acquisition time, the accuracy of the system

can be compromised. To avoid this situation, increase

the acquisition time, use a driving circuit that can settle

within t

ACQ

, or leave the MAX1179/MAX1189 powered

up by setting the voltage at R/C low during the second

falling edge of CS.

Layout, Grounding, and Bypassing

For best performance, use printed circuit (PC) boards.

Do not run analog and digital lines parallel to each

other, and do not lay out digital signal paths under-

neath the ADC package. Use separate analog and dig-

ital ground planes with only one point connecting the

two ground systems (analog and digital) as close to the

device as possible.

Route digital signals far away from sensitive analog and

reference inputs. If digital lines must cross analog lines,

do so at right angles to minimize coupling digital noise

MAX1179/MAX1187/MAX1189

16-Bit, 135ksps, Single-Supply ADCs with

Bipolar Analog Input Range

______________________________________________________________________________________ 11

Figure 9. MAX1187 Transfer Function

OUTPUT CODE

65536

INPUT VOLTAGE (LSB)

INPUT RANGE = 0 TO +10V

2103

65535

65534

11 . . . 111

11 . . . 110

11 . . . 101

00 . . . 011

00 . . . 010

00 . . . 001

00 . . . 000

FULL-SCALE RANGE

(FSR) = +10V

1LSB =

FSR x V

REF

65536 x 4.096

FULL-SCALE

TRANSITION

Figure 10. MAX1189 Transfer Function

OUTPUT CODE

-32768 +32768

INPUT VOLTAGE (LSB)

INPUT RANGE = -10V TO +10V

0-32766

-32767 -32765 +32767

+32766

-1 +1

11 . . . 1111

11 . . . 1110

11 . . . 1101

10 . . . 0001

10 . . . 0000

01 . . . 1111

00 . . . 0011

00 . . . 0010

00 . . . 0001

00 . . . 0000

FULL-SCALE RANGE

(FSR) = +20V

1LSB =

FSR x V

REF

65536 x 4.096

FULL-SCALE

TRANSITION

Figure 8. MAX1179 Transfer Function

OUTPUT CODE

-32768 +32768

INPUT VOLTAGE (LSB)

INPUT RANGE = -5V TO +5V

0-32766

-32767 -32765 +32767

+32766

-1 +1

11 . . . 1111

11 . . . 1110

11 . . . 1101

10 . . . 0001

10 . . . 0000

01 . . . 1111

00 . . . 0011

00 . . . 0010

00 . . . 0001

00 . . . 0000

FULL-SCALE RANGE

(FSR) = +10V

1LSB =

FSR x V

REF

65536 x 4.096

FULL-SCALE

TRANSITION

MAX1179/MAX1187/MAX1189

onto the analog lines. If the analog and digital sections

share the same supply, isolate the digital and analog

supply by connecting them with a low value (10Ω)

resistor or ferrite bead.

The ADC is sensitive to high-frequency noise on the

supply. Bypass AV

to AGND with a 0.1µF

capacitor in parallel with a 1µF to 10µF low-ESR capaci-

tor with the smallest capacitor closest to the device.

Keep capacitor leads short to minimize stray inductance.

Definitions

Integral Nonlinearity

Integral nonlinearity (INL) is the deviation of the values

on an actual transfer function from a straight line. This

straight line can be either a best-straight-line fit or a line

drawn between the end points of the transfer function,

once offset and gain errors have been nullified. The

static linearity parameters for the MAX1179/MAX1187/

MAX1189 are measured using the endpoint method.

Differential Nonlinearity

Differential nonlinearity (DNL) is the difference between

an actual step-width and the ideal value of 1LSB. A

DNL error specification of 1LSB guarantees no missing

codes and a monotonic transfer function.

Signal-to-Noise Ratio

For a waveform perfectly reconstructed from digital

samples, signal-to-noise ratio (SNR) is the ratio of the

full-scale analog input (RMS value) to the RMS quanti-

zation error (residual error). The ideal, theoretical mini-

mum analog-to-digital noise is caused by quantization

noise error only and results directly from the ADC’s res-

olution (N bits):

SNR = ((6.02

N) + 1.76)dB

where N = 16 bits.

In reality, there are other noise sources besides quanti-

zation noise: thermal noise, reference noise, clock jitter,

16-Bit, 135ksps, Single-Supply ADCs with

Bipolar Analog Input Range

12 ______________________________________________________________________________________

Figure 12a. MAX1179 Analog Input Current

MAX1179

ANALOG INPUT CURRENT

vs. ANALOG INPUT VOLTAGE

ANALOG INPUT VOLTAGE (V)

ANALOG INPUT CURRENT (mA)

2.50-2.5

-1.5

-1.0

-0.5

0.5

1.0

1.5

2.0

-2.0

-5.0 5.0

SHUTDOWN MODE

STANDBY MODE

Figure 12b. MAX1189 Analog Input Current

MAX1189

ANALOG INPUT CURRENT

vs. ANALOG INPUT VOLTAGE

ANALOG INPUT VOLTAGE (V)

ANALOG INPUT CURRENT (mA)

50-5

-1.5

-1.0

-0.5

0.5

1.0

1.5

-10 10

SHUTDOWN MODE

STANDBY MODE

Figure 11. MAX1179/MAX1187/MAX1189 Fast-Settling Input

Buffer

MAX1179

MAX1187

MAX1189

MAX427

REF

AIN

ANALOG

INPUT

*MAX1187 ONLY.

**MAX1179/MAX1189 ONLY.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15

MAX1187BEUI+

Mfr. #:

Buy MAX1187BEUI+

Manufacturer:

Maxim Integrated

Description:

Analog to Digital Converters - ADC 16-Bit 135ksps 4.2V Precision ADC

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MAX1187BEUI+

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