ISL95808
6
FN8689.2
May 25, 2016
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Timing Diagram
Description
Theory of Operation
Designed for speed, the ISL95808 dual MOSFET driver controls
both high-side and low-side N-Channel FETs from one externally
provided PWM signal.
A rising edge on PWM initiates the turn-off of the lower MOSFET
(see “Timing Diagram”in Figure 4). After a short propagation
delay [t
PDLL
], the lower gate begins to fall. Typical fall times [t
FL
]
are provided in the “Electrical Specifications” table on page 4.
Adaptive shoot-through circuitry monitors the LGATE voltage.
When LGATE has fallen below 1V, UGATE is allowed to turn on.
This prevents both the lower and upper MOSFETs from
conducting simultaneously, or shoot-through.
A falling transition on PWM indicates the turn-off of the upper
MOSFET and the turn-on of the lower MOSFET. A short
propagation delay [t
PDLU
] is encountered before the upper gate
begins to fall [t
FU
]. The upper MOSFET gate-to-source voltage is
monitored and the lower gate is allowed to rise after the upper
MOSFET gate-to-source voltage drops below 1V. The lower gate
then rises [t
RL
], turning on the lower MOSFET.
This driver is optimized for converters with large step-down
compared to the upper MOSFET because the lower MOSFET
conducts for a much longer time in a switching period. The lower
gate driver is therefore sized much larger to meet this application
requirement.
The 0.5Ω ON-resistance and 4A sink current capability enables
the lower gate driver to absorb the current injected to the lower
gate through the drain-to-gate capacitor of the lower MOSFET.
This prevents a shoot-through caused by the high dv/dt of the
phase node.
The PWM and FCCM pins actively pull to mid-supply if left OPEN.
Diode Emulation
Diode emulation allows for higher converter efficiency under light
load situations. With diode emulation active, the ISL95808 will
detect the zero current crossing of the output inductor and turn
off LGATE. This ensures that Discontinuous Conduction Mode
(DCM) is achieved. Diode emulation is asynchronous to the PWM
signal. Therefore, the ISL95808 will respond to the FCCM input
immediately after it changes state.
NOTE: Intersil does not recommend diode emulation use with r
DS(ON)
current sensing topologies. The turn-off of the low-side MOSFET can cause
gross current measurement inaccuracies.
Three-State PWM Input
A unique feature of the ISL95808 and other Intersil drivers is the
addition of a shutdown window to the PWM input. If the PWM
signal enters and remains within the shutdown window for a set
hold-off time, the output drivers are disabled and both MOSFET
gates are pulled and held low. The shutdown state is removed
when the PWM signal moves outside the shutdown window.
Otherwise, the PWM rising and falling thresholds outlined in the
“Electrical Specifications” table on page 3
determine when the
lower and upper gates are enabled.
The VCC pin of the driver(s) and related VCC or +5V bias supply
pin of the Intersil controller must share a common +5V supply.
Adaptive Shoot-Through Protection
Both drivers incorporate adaptive shoot-through protection to
prevent upper and lower MOSFETs from conducting
simultaneously and shorting the input supply. This is
accomplished by ensuring the falling gate has turned off one
MOSFET before the other is allowed to turn on.
During turn-off of the lower MOSFET, the LGATE voltage is monitored
until it reaches a 1V threshold, at which time the UGATE is released
to rise. Adaptive shoot-through circuitry monitors the upper MOSFET
gate-to-source voltage during UGATE turn-off. Once the upper
PWM
UGATE
LGATE
t
PDLL
t
FL
t
PDHU
t
RU
t
PDLU
t
FU
t
PDHL
t
RL
1V
2.5V
t
RU
t
FU
t
FL
1V
t
PTS
t
TSSHD
t
TSSHD
t
PTS
FIGURE 4. TIMING DIAGRAM
