LTC4232
10
4232fc
For more information www.linear.com/LTC4232
applicaTions inForMaTion
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the timeout delay set
by the TIMER. Current limiting begins when the MOSFET
current reaches 1.5A to 5.6A (depending on the foldback).
The GATE pin is then brought down with a 140mA GATE-
to-OUT current. The voltage on the GATE is regulated in
order to limit the current to less than 5.6A. At this point,
a circuit breaker time delay starts by charging the external
timing capacitor with a 100µA pull-up current from the
TIMER pin. If the TIMER pin reaches its 1.235V threshold,
the internal switch turns off (with a 250µA current from
GATE to ground). Included in the Typical Performance
Characteristics curves is a graph of the Safe Operating
Area for the MOSFET. From this graph one can determine
the MOSFET’s maximum time in current limit for a given
output power.
Tying the TIMER pin to INTV
CC
will force the part to use
the internally generated (circuit breaker) delay of 2ms.
In either case the F LT pin is pulled low to indicate an
overcurrent fault has turned off the pass MOSFET. For a
given circuit breaker time
delay, the equation for setting
the timing capacitor’s value is as follows:
C
T
= t
CB
• 0.083[µF/ms]
After the switch is turned off, the TIMER pin begins dis-
charging the
timing capacitor with aA pull-down cur-
rent.
When the TIMER pin reaches its 0.21V threshold, an
internal
100ms timer is started. After the 100ms delay, the
switch is allowed to turn on again if the overcurrent fault
latch has been cleared. Bringing the UV pin below 0.6V
for a minimum ofs and then high will clear the fault
latch. If the TIMER pin is tied to INTV
CC
then the switch is
allowed to turn on again (after an internal 100ms delay),
if the overcurrent fault latch is cleared.
Tying the F LT pin to the UV pin allows the part to self-clear
the fault and turn the MOSFET on as soon as TIMER pin
has ramped below 0.21V. In this auto-retry mode the
LTC4232 repeatedly tries to turn on after an overcurrent
at a period determined by the capacitor on the TIMER pin.
The auto-retry mode also functions when the TIMER pin
is tied to INTV
CC
.
The waveform in Figure 4 shows how the output latches
off
following a short-circuit. The current in the MOSFET
is 1.4A as the timer ramps up.
10µF, especially if the wiring inductance from the supply
to the V
DD
pin is greater thanH. The possibility of oscil-
lation will increase as the load current (during power-up)
increases.
There are two ways to prevent this type of
oscillation. The simplest way is to avoid load capacitances
below 10µF. For wiring inductance larger than 20µH, the
minimum load capacitance may extend to 100µF. A second
choice is to connect an external gate capacitor C
P
>1.5nF
as shown in Figure 3.
Figure 3. Compensation for Small C
LOAD
4232 F03
LTC4232
OPTIONAL
RC TO LOWER
INRUSH CURRENT
GATE
C
P
2.2nF
Turn-Off Sequence
The switch can be turned off by a variety of conditions. A
normal turn-off is initiated by the UV pin going below its
1.235V threshold. Additionally, several fault conditions
will turn off the switch. These include an input overvolt
-
age (OV pin
), overcurrent circuit breaker (SENSE pin) or
overtemperature.
Normally the switch is turned off with
a 250µA current pulling down the GATE pin to ground.
With the switch turned off, the OUT voltage drops which
pulls the FB pin below its threshold. PG then pulls low to
indicate output power is no longer good.
If V
DD
drops below 2.65V for greater thans or INTV
CC
drops below 2.5V for greater thans, a fast shutdown
of the switch is initiated. The GATE is pulled down with a
140mA current to the OUT pin.
Overcurrent Fault
The LTC4232 features an adjustable current limit with
foldback that protects against short-circuits and excessive
load current. To prevent excessive power dissipation in the
switch during active current limit, the available current is
reduced as a function of the output voltage sensed by the
FB pin. A graph in the Typical Performance Characteristics
curves shows the Current Limit
Threshold Foldback.
LTC4232
11
4232fc
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Current Limit Adjustment
The default value of the active current limit is 5.6A. The
current limit threshold can be adjusted lower by placing
a resistor between the I
SET
pin and ground. As shown in
the Functional Block Diagram the voltage at the I
SET
pin
(via the clamp circuit) sets the CS amplifier’s built-in offset
voltage. This offset voltage directly determines the active
current limit value. With the I
SET
pin open, the voltage at
the I
SET
pin is determined by a positive temperature co-
efficient reference.
This voltage is set to 0.618V at room
temperature which corresponds to a 5.6A current limit at
room temperature.
An external resistor R
SET
placed between the I
SET
pin and
ground forms a resistive divider with the internal 20k R
ISET
sourcing resistor. The divider acts to lower the voltage at
the I
SET
pin and therefore lower the current limit threshold.
The overall current limit threshold precision is reduced to
±12% when using a 20k resistor to halve the threshold.
Using a switch (connected to ground) in series with R
SET
allows the active current limit to change only when the
switch is closed. This feature can be used to
program a
reduced
running current while the maximum available
current limit is used at startup.
Monitor MOSFET Temperature
The voltage at the I
SET
pin increases linearly with increas-
ing temperature.
The temperature profile of the I
SET
pin is
shown in the Typical Performance Characteristics section.
Using a comparator or ADC to measure the I
SET
voltage
provides an indicator of the MOSFET temperature.
The I
SET
voltage follows the formula:
V
ISET
=
R
SET
R
SET
+R
ISET
T + 273°C
( )
2.093 mV / °C
[ ]
The MOSFET temperature is calculated using R
ISET
of 20k.
T =
SET
+
ISET
R
SET
2.093 mV / °C
[ ]
273°C
When R
SET
is not present, T becomes:
T =
V
ISET
2.093 mV / °C
[ ]
273°C
There is an overtemperature circuit in the LTC4232 that
monitors an internal voltage similar to the I
SET
pin voltage.
When the die temperature exceeds 145°C the circuit turns
off the MOSFET until the temperature drops to 125°C.
Monitor MOSFET Current
The current in the MOSFET passes through an internal
7.5mΩ sense resistor. The voltage on the sense resistor is
converted to a current that is sourced out of the I
MON
pin.
The gain of I
SENSE
amplifier is 20µA/A referenced from the
MOSFET current. This output current can be converted to
a voltage using an external resistor to drive a comparator
or ADC. The voltage compliance for the I
MON
pin is from
0V to INTV
CC
– 0.7V.
A microcontroller with a built-in comparator can build a
simple integrating single-slope ADC by resetting a capaci
-
tor that is charged with this current. When the capacitor
voltage trips the comparator and the capacitor is reset, a
timer is started. The time between resets will indicate the
MOSFET current.
Monitor OV and UV Faults
Protecting the load from an overvoltage condition is the
main function of the OV pin. In Figure 1 an external resis
-
tive divider (driving the OV pin) connects to a comparator
to
turn off the MOSFET when the V
DD
voltage exceeds
15.2V. If the V
DD
pin subsequently falls back below 14.9V,
the switch will be allowed to turn on immediately. In the
LTC4232 the OV pin threshold is 1.235V when rising, and
1.215V when falling out of overvoltage.
Figure 4. Short-Circuit Waveform
∆V
GATE
10V/DIV
I
OUT
2A/DIV
V
OUT
10V/DIV
TIMER
2V/DIV
1ms/DIV
4232 F04
LTC4232
12
4232fc
For more information www.linear.com/LTC4232
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The UV pin functions as an undervoltage protection pin
or as anON” pin. In the Figure 1 application the MOSFET
turns off when V
DD
falls below 9.23V. If the V
DD
pin sub-
sequently rises
above 9.88V for 100ms, the switch will
be allowed to turn on again. The LTC4232 UV turn-on/off
thresholds are 1.235V (rising) and 1.155V (falling).
In the cases of an undervoltage or overvoltage the MOSFET
turns off and there is indication on the PG status pin. When
the overvoltage is removed the MOSFET’s gate ramps up
immediately at the rate determined by the INRUSH block.
Power Good Indication
In addition to setting the foldback current limit threshold,
the FB pin is used to determine a power good condition.
The Figure 1 application uses an external resistive divider
on the OUT pin to drive the FB pin. The PG comparator
indicates logic high when OUT pin rises above 10.5V. If the
OUT pin subsequently falls below 10.3V the comparator
toggles low. On the LTC4232 the PG comparator drives
high when the FB pin rises above 1.235V and low when
it falls below 1.215V.
Once the PG comparator is high the GATE pin
voltage is
monitored
with respect to the OUT pin. Once the GATE
minus OUT voltage exceeds 4.2V the PG pin goes high.
This indicates to the system that it is safe to load the OUT
pin while the MOSFET is completely turnedon”. The PG
pin goes low when the GATE is commanded off (using
the UV, OV or SENSE pins) or when the PG comparator
drives low.
Design Example
Consider the following design example (Figure 5): V
IN
=
12V, I
MAX
= 5A. I
INRUSH
= 100mA, C
L
= 330µF, V
UVON
=
9.88V, V
OVOFF
= 15.2V, V
PGTHRESHOLD
= 10.5V. A current
limit fault triggers an automatic restart of the power-up
sequence.
The inrush current is defined by the current required to
charge the output capacitor using the fixed 0.3V/ms GATE
charge-up rate. The inrush current is defined as:
I
INRUSH
= C
L
0.3[V/ms] = 330µF 0.3[V/ms] = 100mA
As mentioned previously the charge-up time is the out-
put voltage
(12
V) divided by the output rate of 0.3V/ms
resulting in 40ms. The peak power dissipation of 12V at
100mA (or 1.2W) is within the SOA of the pass MOSFET
for 40ms (see MOSFET SOA curve in the Typical Perfor
-
mance Characteristics section).
Next
the power dissipated in the MOSFET during overcur-
rent must
be limited. The active current limit uses a timer
to
prevent excessive energy dissipation in the MOSFET.
The worst-case power dissipation occurs when the voltage
versus current profile of the foldback current limit is at the
maximum. This occurs when the current is 6.1A and the
voltage is one half of the V
IN
or 6V. See the Current Limit
Threshold Foldback in the Typical Performance Charac-
teristics section
to view this profile. In order to survive
36W, the MOSFET SOA dictates a maximum time of 10ms
(see SOA graph). Use the internal 2ms timer invoked by
tying the TIMER pin to INTV
CC
. After the 2ms timeout the
F LT pin needs to pull-down on the UV pin to restart the
power-up sequence.
The values for overvoltage, undervoltage and power good
thresholds using the resistive dividers on the UV, OV and
FB pins match the requirements of turn-on at 9.88V and
turn-off at 15.2V.
The final schematic in Figure 5 results in very few external
components. The pull-up resistor, R7, connects to the PG
pin while the 20k (R
MON
) converts the I
MON
current to a
voltage at a ratio:
V
IMON
= 20[µA/A] • 20kI
OUT
= 0.4[V/A] • I
OUT
In addition there is aF bypass (C1) on the INTV
CC
pin.
Figure 5. 5A, 12V Card Resident Application
ADC
R1
226k
C1
1µF
R2
20k
12V
R3
140k
R4
20k
R
MON
20k
4232 F05
C
L
330µF
UV = 9.88V
OV = 15.2V
PG = 10.5V
V
DD
UV
OUT
FB
PG
GATE
GND
I
MON
I
SET
LTC4232
OV
INTV
CC
TIMER
F LT
+
V
OUT
12V
5A
R7
10k
R6
20k
R5
150k
Z1*
*TVS Z1: DIODES INC. SMAJ17A

LTC4232IDHC#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers 2.9V to 15V, 5A Integrated Hot Swap Controller with 100ms Turn-On Delay
Lifecycle:
New from this manufacturer.
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