LTC4232
8
4232fc
For more information www.linear.com/LTC4232
operaTion
The Functional Diagram displays the main circuits of the
device. The LTC4232 is designed to turn a board’s supply
voltage on and off in a controlled manner allowing the board
to be safely inserted and removed from a live backplane.
The LTC4232 includes a 25mΩ MOSFET and a 7.5mΩ cur
-
rent sense
resistor. During normal operation, the charge
pump
and gate driver turn on the pass MOSFET’s gate to
provide power to the load. The inrush current control is
accomplished by the INRUSH circuit. This circuit limits
the GATE ramp rate to 0.3V/ms and hence controls the
voltage ramp rate of the output capacitor.
The current sense (CS) amplifier monitors the load current
using the voltage sensed across the current sense resistor.
The CS amplifier limits the current in the load by reduc
-
ing the GATE-to-OUT voltage in an active control loop. It
is simple to adjust the current limit threshold using the
current limit adjustment (I
SET
) pin. This allows a different
threshold during other times such as start-up.
A short circuit on the output to ground causes significant
power dissipation during active current limiting. To limit
this power, the
foldback amplifier
reduces the current
limit value from 5.6A to 1.5A in a linear manner as the
FB pin drops below 0.6V (see the Typical Performance
Characteristics section).
If an overcurrent condition persists, the TIMER pin ramps
up with a 100µA current source until the pin voltage exceeds
1.235V (comparator TM2). This indicates to the logic that
it is time to turn off the pass MOSFET to prevent overheat
-
ing. At
this point the TIMER pin ramps down using the
2µA
current source until the voltage drops below 0.21V
(Comparator TM1) which tells the logic to start an internal
100ms timer. At this point, the pass transistor has cooled
and it is safe to turn it on again. It is suitable for many
applications to use an internal 2ms overcurrent timer with
a 100ms cooldown period. Tying the TIMER pin to INTV
CC
sets this default timing. Latchoff is the normal operating
condition following overcurrent turnoff. Retry is initiated
by pulling the UV pin low for a minimum of 1µs then high.
Auto retry is implemented by tying the F LT to the UV pin.
The output voltage is monitored using the FB pin and the
PG comparator to determine
if the power is available for
the load. The power good condition is signaled by the PG
pin using an open-drain pull-down transistor.
The Functional Diagram also shows the monitoring blocks
of the LTC4232. The two comparators on the left side
include the UV and OV comparators. These comparators
determine if the external conditions are valid prior to turning
on the MOSFET. But first the undervoltage lockout circuits
UVLO1 and UVLO2 must validate the input supply and
the internally generated 3.1V supply (INTV
CC
) and gener-
ate the power up initialization to the logic circuits. If the
external
conditions remain valid for 100ms the MOSFET
is allowed to turn on.
Other features include MOSFET current and temperature
monitoring. The current monitor (CM) outputs a current
proportional to the sense resistor current. This current can
drive an external resistor or other circuits for monitoring
purposes. A voltage proportional to the MOSFET tempera
-
ture is
output to the I
SET
pin. The MOSFET is protected by
a thermal shutdown circuit.
