SPD100N03S2L-04 Datasheet SPD100N03S2L-04, SPD100N03S2L04T | P1-P3

2003-05-09

Page 1

SPD100N03S2L-04

OptiMOS



Power-Transistor

Product Summary

V

DS

30 V

R

DS(on)

4.2 mΩ

I

D

100 A

Feature

• N-Channel

• Enhancement mode

• Logic Level

• Excellent Gate Charge x R

DS(on)

product (FOM)

• Superior thermal resistance

• 175°C operating temperature

• Avalanche rated

• dv/dt rated

P-TO252-5-1

Titel:

C:\ARJ\VPT09161.EPS

Erstellt von:

1)

Gate

pin 1

Drain

pin 3,6

Source

pin 4,5

n.c.: pin 2

Marking

PN03L04

Type Package Ordering Code

SPD100N03S2L-04 P-TO252-5-1 Q67042-S4128

Maximum Ratings, at T

j

= 25 °C, unless otherwise specified

Parameter Symbol Value Unit

Continuous drain current

2)

T

C

=100°C

I

D

100

A

Pulsed drain current

T

C

=25°C

I

D puls

400

Avalanche energy, single pulse

I

D

=80A, V

DD

=25V, R

GS

=25Ω

E

AS

325 mJ

Repetitive avalanche energy, limited by T

jmax

3)

E

AR

15

Reverse diode dv/dt

I

S

=100A, V

DS

=24V, di/dt=200A/µs, T

jmax

=175°C

dv/dt

6 kV/µs

Gate source voltage V

GS

±20

V

Power dissipation

T

C

=25°C

P

tot

150 W

Operating and storage temperature T

j

, T

stg

-55... +175

°C

IEC climatic category; DIN IEC 68-1 55/175/56

2003-05-09

Page 2

SPD100N03S2L-04

Thermal Characteristics

Parameter Symbol Values Unit

min. typ. max.

Characteristics

Thermal resistance, junction - case R

thJC

- 0.7 1 K/W

SMD version, device on PCB:

@ min. footprint

@ 6 cm

2

cooling area

4)

R

thJA

-

75

50

Electrical Characteristics, at T

j

= 25 °C, unless otherwise specified

Parameter Symbol Values Unit

min. typ. max.

Static Characteristics

Drain-source breakdown voltage

V

GS

=0V, I

D

=1mA

V

(BR)DSS

30 - - V

Gate threshold voltage, V

GS

= V

DS

I

D

= 100 µA

V

GS(th)

1.2 1.6 2

Zero gate voltage drain current

V

DS

=30V, V

GS

=0V, T

j

=25°C

V

DS

=30V, V

GS

=0V, T

j

=125°C

I

DSS

-

0.01

10

1

100

µA

Gate-source leakage current

V

GS

=20V, V

DS

=0V

I

GSS

- 1 100 nA

Drain-source on-state resistance

V

GS

=4.5V, I

D

=50A

R

DS(on)

- 5 6.3

mΩ

Drain-source on-state resistance

V

GS

=10V, I

D

=50A

R

DS(on)

- 3.4 4.2

1

pin 1 and 2 have to be connected together on the PCB as well as pin 4 and 5.

2

Current limited by bondwire ; with an R

thJC

= 1K/W the chip is able to carry I

D

= 307A at 25°C, for detailed

information see app.-note ANPS071E available at www.infineon.com/optimos

3

Defined by design. Not subject to production test.

4

Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical without blown air.

2003-05-09

Page 3

SPD100N03S2L-04

Electrical Characteristics

Parameter Symbol Conditions Values Unit

min. typ. max.

Dynamic Characteristics

Transconductance g

fs

V

DS

≥2*I

D

*R

DS(on)max

,

I

D

=100A

59 118 - S

Input capacitance C

iss

V

GS

=0V, V

DS

=25V,

f=1MHz

- 2500 3320 pF

Output capacitance C

oss

- 980 1300

Reverse transfer capacitance C

rss

- 230 350

Turn-on delay time t

d(on)

V

DD

=15V, V

GS

=10V,

I

D

=50A,

R

G

=2.7Ω

- 12 18 ns

Rise time t

r

- 17 26

Turn-off delay time t

d(off)

- 45 67

Fall time t

f

- 24 36

Gate Charge Characteristics

Gate to source charge Q

gs

V

DD

=24V, I

D

=100A - 7.9 10.5 nC

Gate to drain charge Q

gd

- 23.3 35

Gate charge total Q

g

V

DD

=24V, I

D

=100A,

V

GS

=0 to 10V

- 67.5 89.7

Gate plateau voltage V

(plateau)

V

DD

=24V, I

D

=100A - 3.6 - V

Reverse Diode

Inverse diode continuous

forward current

I

S

T

C

=25°C - - 100 A

Inv. diode direct current, pulsed I

SM

- - 400

Inverse diode forward voltage V

SD

V

GS

=0V, I

F

=80A - 0.9 1.3 V

Reverse recovery time t

rr

V

R

=15V, I

F

=l

S

,

di

F

/dt=200A/µs

- 46 58 ns

Reverse recovery charge Q

rr

- 56 69 nC

SPD100N03S2L-04

SPD100N03S2L-04

Products related to this Datasheet