NCV7340
http://onsemi.com
7
Table 6. CHARACTERISTICS V
CC
= 4.75 V to 5.25 V; T
J
= −40 to +150°C; R
LT
= 60 W unless specified otherwise.
Symbol UnitMaxTypMinConditionsParameter
BUS LINES (Pins CANH and CANL)
I
o(sc)
(CANL)
Short circuit output current at pin CANL for
the NCV7340D13(R2)G
V
CANL
= 36 V; V
TxD
= 0 V 45 70 100 mA
Short circuit output current at pin CANL for
NCV7340D12(R2)G & NCV7340D14(R2)G
V
CANL
= 36 V; V
TxD
= 0 V 45 70 120 mA
V
i(dif)
(th)
Differential receiver threshold voltage (see
Figure 6)
−5 V < V
CANL
< +12 V;
−5 V < V
CANH
< +12 V;
0.5 0.7 0.9 V
V
ihcm(dif)
(th)
Differential receiver threshold voltage for
high common−mode (see Figure 6)
−35 V < V
CANL
< +35 V;
−35 V < V
CANH
< +35 V;
0.40 0.7 1.0 V
V
i(dif)
(th)_STDBY
Differential receiver threshold voltage in
standby mode (see Figure 6)
−12 V < V
CANL
< +12 V;
−12 V < V
CANH
< +12 V;
0.4 0.8 1.15 V
R
i(cm)
(CANH)
Common−mode input resistance at pin
CANH
15 26 37
kW
R
i(cm)
(CANL)
Common−mode input resistance at pin
CANL
15 26 37
kW
R
i(cm)
(m)
Matching between pin CANH and pin CANL
common mode input resistance
V
CANH
= V
CANL
−0.8 0 +0.8 %
R
i(dif)
Differential input resistance 25 50 75
kW
C
i(CANH)
Input capacitance at pin CANH V
TxD
= V
CC
; not tested 7.5 20 pF
C
i(CANL)
Input capacitance at pin CANL V
TxD
= V
CC
; not tested 7.5 20 pF
C
i(dif)
Differential input capacitance V
TxD
= V
CC
; not tested 3.75 10 pF
COMMON−MODE STABILIZATION (Pin V
SPLIT
)
V
SPLIT
Reference output voltage at pin V
SPLIT
Normal mode;
−500 mA < I
SPLIT
< 500 mA
0.3 x
V
CC
− 0.7 x
V
CC
I
SPLIT(i)
V
SPLIT
leakage current Standby mode −5 +5
mA
I
SPLIT(lim)
V
SPLIT
limitation current Normal mode 1.3 5.0 mA
THERMAL SHUTDOWN
T
J(sd)
Shutdown junction temperature junction temperature rising 150 160 185 °C
TIMING CHARACTERISTICS (see Figures 7 and 8)
t
d(TxD−BUSon)
Delay TxD to bus active C
l
= 100 pF between
CANH to CANL
20 85 135 ns
t
d(TxD−BUSoff)
Delay TxD to bus inactive C
l
= 100 pF between
CANH to CANL
5.0 60 105 ns
t
d(BUSon−RXD)
Delay bus active to RxD C
rxd
= 15 pF 25 55 105 ns
t
d(BUSoff−RXD)
Delay bus inactive to RxD C
rxd
= 15 pF 30 100 105 ns
t
pd(rec−dom)
Propagation delay TxD to RxD from
recessive to dominant
C
l
= 100 pF between
CANH to CANL
60 230 ns
t
d(dom−rec)
Propagation delay TxD to RxD from
dominant to recessive
C
l
= 100 pF between
CANH to CANL
60 245 ns
t
d(stb−nm)
Delay standby mode to normal mode 5.0 7.5 10
ms
t
Wake
Dominant time for wake−up via bus
V
dif(dom)
> 1.4 V 0.75 2.5 5.0
ms
V
dif(dom)
> 1.2 V 0.75 3 5.8
ms
t
dwakerd
Delay to flag wake event (recessive to
dominant transitions) (See Figure 4)
Valid bus wake up event,
C
RxD
= 15 pF
1.0 3.4 10
ms
t
dwakedr
Delay to flag end of wake event (dominant
to recessive transition) (See Figure 4)
Valid bus wake up event,
C
RxD
= 15 pF
0.5 2.9 6.0
ms
t
Wake(RxD)
Minimum pulse width on RxD (See Figure 4)
5 ms t
wake
, C
RxD
= 15 pF
0.5
ms
t
dom(TxD)
TxD dominant time for time out V
TxD
= 0 V 300 650 1000
ms
