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MC100LVEL37DWR2G

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 7
1 Publication Order Number:
MC100LVEL37/D
MC100LVEL37
3.3 V ECL 1:4 ÷1/÷2 Clock
Fanout Buffer
Description
The MC100LVEL37 is a fully differential 1:4 fanout buffer. The
device offers two outputs at ÷1 of the input frequency, and two outputs
at ÷2 of the input frequency. The Low Output-Output Skew of the
device makes it ideal for distributing 1x and 1/2x frequency
synchronous signals.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the CLKn input will pull down to V
EE
, The CLKn input
will bias around V
CC
/2 and the Qn output will go LOW.
Features
• 700 ps Typical Propagation Delays
• 50 ps Maximum Output-Output Skews
• ESD Protection:
♦ > 2 kV Human Body Model
♦ > 200 V Machine Model
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: V
CC
= 3.0 V to 3.8 V
with V
EE
= 0 V
• NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= −3.0 V to −3.8 V
• Internal Input Pulldown Resistors
• Qn Output will Default LOW with Inputs Open or at V
EE
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity: Level 3 (Pb-Free)
(For Additional Information, see Application Note AND8003/D
)
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index 28 to 34
• Transistor Count = 256 Devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
MARKING DIAGRAM*
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
SOIC−20 WB
DW SUFFIX
CASE 751D−05
20
1
100LVEL37
AWLYYWWG
ORDERING INFORMATION
Device Package Shipping†
MC100LVEL37DWG 38 Units / Tube
MC100LVEL37DWR2G
1000Tape & Reel
SOIC−20 WB
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
.
SOIC−20 WB
(Pb-Free)
MC100LVEL37
www.onsemi.com
2
Figure 1. 20-Lead Pinout (Top View)
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3
V
CC
CLK0 CLK0 Clk_Sel CLK1 CLK1 MR V
EE
1920 18 17 16 15 14
21 34567
V
EE
13
8
12
9
11
10
V
CC
V
CC
V
EE
÷1 ÷2
Warning: All V
CC
and V
EE
pins must be externally connected
to Power Supply to guarantee proper operation.
FUNCTION
ECL Differential Clock ÷1 Outputs
ECL Differential Clock ÷2 Outputs
ECL Differential Clock Inputs
ECL Input Clock Selection
ECL Asynchronous Master Reset
Positive Supply
Negative Supply
PIN
Q0, Q0
; Q1, Q1
Q2, Q2; Q3, Q3
CLKn, CLKn
Clk_Sel
MR
V
CC
V
EE
MR
L
L
H
Clk_Sel
L
H
X
Q0, 1
CLK0/÷1
CLK1/÷1
L
X = Don’t Care
Q2, 3
CLK0/÷2
CLK1/÷2
L
Table 1. TRUTH TABLE
Table 2. PIN DESCRIPTION
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 8 to 0 V
V
EE
NECL Mode Power Supply V
CC
= 0 V −8 to 0 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
≤ V
CC
V
I
≥ V
EE
6 to 0
−6 to 0
V
I
out
Output Current Continuous
Surge
50
100
mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction to Ambient) 0 lfpm
500 lfpm
SOIC−20 WB
SOIC−20 WB
90
60
°C/W
q
JC
Thermal Resistance (Junction to Case) Standard Board SOIC−20 WB 30 to 35 °C/W
T
sol
Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
MC100LVEL37
www.onsemi.com
3
Table 4. LVPECL DC CHARACTERISTICS (V
CC
= 3.3 V; V
EE
= 0.0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 38 50 38 55 38 55 mA
V
OH
Output HIGH Voltage (Note 2) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV
V
OL
Output LOW Voltage (Note 2) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV
V
IH
Input HIGH Voltage (Single-Ended) 2135 2420 2135 2420 2135 2420 mV
V
IL
Input LOW Voltage (Single-Ended) 1490 1825 1490 1825 1490 1825 mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
V
PP
< 500 mV
V
PP
≥ 500 mV
1.3
1.5
2.9
2.9
1.2
1.4
2.9
2.9
1.2
1.4
2.9
2.9
V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current
CLKn
CLKn
0.5
−300
0.5
−300
0.5
−300
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
3. V
IHCMR
min varies 1:1 with V
EE
, max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PP
min and 1 V.
Table 5. LVNECL DC CHARACTERISTICS (V
CC
= 0.0 V; V
EE
= −3.3 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 38 50 38 55 38 55 mA
V
OH
Output HIGH Voltage (Note 2) −1085 −1005 −880 −1025 −955 −880 −1025 −955 −880 mV
V
OL
Output LOW Voltage (Note 2) −1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV
V
IH
Input HIGH Voltage (Single-Ended) −1165 −880 −1165 −880 −1165 −880 mV
V
IL
Input LOW Voltage (Single-Ended) −1810 −1475 −1810 −1475 −1810 −1475 mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
V
PP
< 500 mV
V
PP
≥ 500 mV
−2.0
−1.8
−0.4
−0.4
−2.1
−1.9
−0.4
−0.4
−2.1
−1.9
−0.4
−0.4
V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current
CLKn
CLKn
0.5
−300
0.5
−300
0.5
−300
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
3. V
IHCMR
min varies 1:1 with V
EE
, max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PP
min and 1 V.
P1-P3P4-P6P7-P7

MC100LVEL37DWR2G

Mfr. #:
Buy MC100LVEL37DWR2G
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution 3.3V ECL Clock Fanout Buffer
Lifecycle:
New from this manufacturer.
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