GTLP10B320MTDX Datasheet GTLP10B320MTDX, GTLP10B320MTD | P10-P12

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GTLP10B320

AC Extended Electrical Characteristics

Over recommended ranges of supply voltage and operating free air temperature V

REF

= 1.0V (unless otherwise noted).

= 30 pF for B Port and C

= 50 pF for C Port.

Note 14: t

OSHL

OSLH

and t

OST

- Output to output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs

within the same packaged device. The specifications are given for specific worst case V

and temperature and apply to any outputs switching in the same

direction either HIGH-to-LOW (t

OSHL

) or LOW-to-HIGH (t

OSLH

) or in opposite directions both HL and LH (t

OST

). This parameter is guaranteed by design and

statistical process distribution. Actual skew values between the GTLP outputs could vary on the backplane due to the loading and impedance seen by the

device.

Note 15: t

- Part to part skew is defined as the absolute value of the difference between the actual propagation delay for all outputs from device to device.

The parameter is specified for a specific worst case V

and temperature. This parameter is guaranteed by design and statistical process distribution. Actual

skew values between the GTLP outputs could vary on the backplane due to the loading and impedance seen by the device.

Note 16: Due to the open drain structure on GTLP outputs t

OST

and t

PV(LH)

in the A-to-B direction are not specified. Skew on these paths is dependent on the

and R

values on the backplane.

Symbol Path From To Mode Max Unit

OSLH

(Note 14) A B

(n+1)

SAB = 1 0.5

OSHL

(Note 14) 0.4

PVHL

(Note 15)(Note 16) A B

(n+1)

SAB = 1 2.0 ns

OSLH

(Note 14) LECLKAB B

(n+1)

SAB = 1 0.5

OSHL

(Note 14) 0.4

PVHL

(Note 15)(Note 16) LECLKAB B

(n+1)

SAB = 1 2.0 ns

OSLH

(Note 14) LECLKAB B

(n+1)

SAB = 0 0.5

OSHL

(Note 14) 0.4

PVHL

(Note 14)(Note 15) LECLKAB B

(n+1)

SAB = 0 2.0 ns

OSLH

(Note 14) B C

(n+1)

SBC = 1 0.4

OSHL

(Note 14) 0.4

OST

(Note 14) B C

(n+1)

SBC = 1 1.0 ns

(Note 15) B C

(n+1)

SBC = 1 1.5 ns

OSLH

(Note 14) LECLKBC C

(n+1)

SBC = 1 0.4

OSHL

(Note 14) 0.4

OST

(Note 14) LECLKBC C

(n+1)

SBC = 1 1.0 ns

(Note 15) LECLKBC C

(n+1)

SBC = 1 1.5 ns

OSLH

(Note 14) LECLKBC C

(n+1)

SBC = 0 0.4

OSHL

(Note 14) 0.4

OST

(Note 14) LECLKBC C

(n+1)

SBC = 0 1.0 ns

(Note 15) LECLKBC C

(n+1)

SBC = 0 1.5 ns

OSLH

(Note 14) SEL C

(n+1)

0.4

OSHL

(Note 14) 0.4

OST

(Note 14) SEL C

(n+1)

1.0 ns

(Note 15) SEL C

(n+1)

1.2 ns

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GTLP10B320

Test Circuits and Timing Waveforms

Test Circuit for A Outputs

Note A: C

includes probes and Jig capacitance.

Test Circuit for B Outputs

Note B: For B Port, C

= 30 pF or 10 pF.

Voltage Waveform - Propagation Delay Times Voltage Waveform - Setup and Hold Times

Voltage Waveform - Pulse Width Voltage Waveform - Enable and Disable times

Output Waveform 1 is for an output with internal conditions such that the

output is LOW except when disabled by the control output.

Output Waveform 2 is for an output with internal conditions such that the

output is HIGH except when disabled by the control output.

Input and Measure Conditions

All input pulses have the following characteristics: Frequency = 10MHz, t

RISE

= t

FALL

= 2 ns (10% to 90%), Z

= 50Ω

The outputs are measured one at a time with one transition per measurement.

Test S

PLH

PHL

Open

PLZ

PZL

PHZ

PZH

GND

A or LVTTL

Pins

B or GTLP

Pins

inHIGH

1.5

inLOW

0.0 0.0

/2 1.0

+ 0.3V N/A

− 0.3V N/A

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GTLP10B320 10-Bit LVTTL/GTLP Transceiver with Split LVTTL Port and Feedback Path

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

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GTLP10B320MTDX

Mfr. #:

Buy GTLP10B320MTDX

Manufacturer:

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Description:

Bus Transceivers 10-Bit Transceiver LVTTL/GTLP

Lifecycle:

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GTLP10B320MTDX

GTLP10B320MTDX

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