AD9850
–14–
REV. H
AD9850 Evaluation Board Instructions
Required Hardware/Software
IBM compatible computer operating in a Windows environment.
Printer port, 3.5 inch floppy drive, and Centronics compatible
printer cable.
XTAL clock or signal generator—if using a signal generator,
dc offset the signal to one-half the supply voltage and apply
at least 3 V p-p signal across the 50 (R2) input resistor.
Remove R2 for high Z clock input.
AD9850 evaluation board software disk and AD9850/FSPCB
or AD9850/CGPCB evaluation board.
5 V voltage supply.
Setup
1. Copy the contents of the AD9850 disk onto your hard drive
(there are three files).
2. Connect the printer cable from your computer to the AD9850
evaluation board.
3. Apply power to AD9850 evaluation board. The AD9850 is
powered separately from the connector marked DUT +V.
The AD9850 may be powered with 3.3 V to 5 V.
4. Connect external 50 clock or remove R2 and apply a high
Z input clock such as a crystal can oscillator.
5. Locate the file called 9850REV2.EXE and execute that program.
6. Monitor should display a control panel to allow operation of
the AD9850 evaluation board.
Operation
On the control panel, locate the box called COMPUTER I/O.
Point to and click the selection marked LPT1 and then point to
the TEST box and click. A message will appear telling users if
their choice of output ports is correct. Choose other ports as
necessary to achieve a correct setting. If they have trouble get-
ting their computer to recognize any printer port, they should
try the following: connect three 2 k pull-up resistors from Pins
9, 8, and 7 of U3 to 5 V. This will assist weak printer port out-
puts in driving the heavy capacitance load of the printer cable. If
troubles persist, try a different printer cable.
Locate the MASTER RESET button with the mouse and click
it. This will reset the AD9850 to 0 Hz, 0° phase. The output
should be a dc voltage equal to the full-scale output of the
AD9850.
Locate the CLOCK box and place the cursor in the frequency
box. Type in the clock frequency (in MHz) that the user will be
applying to the AD9850. Click the LOAD button or press enter
on the keyboard.
Move the cursor to the OUTPUT FREQUENCY box and type in
the desired output frequency (in MHz). Click the LOAD button or
press the enter key. The BUS MONITOR section of the control
panel will show the 32-bit word that was loaded into the
AD9850. Upon completion of this step, the AD9850 output
should be active and outputting the user's frequency information.
Changing the output phase is accomplished by clicking on the
down arrow in the OUTPUT PHASE DELAY box to make a
selection and then clicking the LOAD button.
Other operational modes (frequency sweeping, sleep, serial
input) are available to the user via keyboard/mouse control.
The AD9850/FSPCB provides access into and out of the on-chip
comparator via test point pairs (each pair has an active input and a
ground connection). The two active inputs are labeled TP1 and
TP2. The unmarked hole next to each labeled test point is a
ground connection. The two active outputs are labeled TP5 and
TP6. Unmarked ground connections are adjacent to each of these
test points.
The AD9850/CGPCB provides BNC inputs and outputs associ-
ated with the on-chip comparator and the on-board, fifth-order,
200 input/output Z, elliptic, 45 MHz, low-pass filter. Jumpering
(soldering a wire) E1 to E2, E3 to E4, and E5 to E6 connects the
on-board filter and the midpoint switching voltage to the com-
parator. Users may elect to insert their own filter and compara-
tor threshold voltage by removing the jumpers and inserting a
filter between J7 and J6 and then providing a threshold voltage
at E1.
If users choose to use the XTAL socket to supply the clock to
the AD9850, they must remove R2 (a 50 chip resistor).
The crystal oscillator must be either TTL or CMOS (prefer-
ably) compatible.
AD9850
–15–
REV. H
J6
R1
3.9k
R5
25
17
16
15
20
19
18
28
27
26
25
24
23
22
21
14
13
12
11
10
9
8
1
2
3
4
7
6
5
U1
AD9850
D3
D2
D1
DGND
DVDD
W
CLK
FQ
UD
CLKIN
AGND
AVDD
R
SET
QOUT
QOUTB
D0
D7
D6
D5
D4
RESET
DVDD
DGND
AGND
IOUTB
IOUT
AVDD
VINN
VINP
DACBL
D3
D2
D1
D0
GND
+V
D7
D6
D5
D4
+V
GND
RESET
GND
WCLK
CLKIN
GND
+V
FQUD
+V
10mA
R
SET
TP5
TP6
TP7
TP8
GND
GND
GND
GND
TP1
TP2
TP3
TP4
R4
50
DAC OUT
TO 50
COMPARATOR
INPUTS
R6
1k
R7
1k
GND
+V
COMPARATOR
OUTPUTS
14
VCC
+5V
R2
50
J5
CLKIN
REMOVE
WHEN
USING Y1
8
OUT
XTAL
OSC
GND
Y1
7
RESET
WCLK
FQUD
CHECK
RRESET
WWCLK
FFQUD
RRESET
12
13
14
15
16
17
18
19
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
8D
7D
6D
5D
4D
3D
2D
1D
9
8
7
6
5
4
3
2
U3
74HCT574
CLK
OE
11 1
STROBE
C36CRPX
J1
D0
D1
D2
D3
D4
D5
D6
D7
12
13
14
15
16
17
18
19
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
8D
7D
6D
5D
4D
3D
2D
1D
9
8
7
6
5
4
3
2
U2
74HCT574
CLK
OE
11 1
STROBE
RRESET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
FFQUD
WWCLK
STROBE
CHECK
P
O
R
T
1
+V
5V
C2
0.1F
C3
0.1F
C4
0.1F
C5
0.1F
C8
0.1F
C9
0.1F
C10
0.1F
C6
10F
C7
10F
+V
5V
J2
J3
J4
BANANA
JACKS
+V
5V
GND
H1
No. 6
H2
No. 6
H3
No. 6
H4
No. 6
MOUNTING
HOLES
R10
2.2k
5V
RRESET
R9
2.2k
FFQUD
R8
2.2k
WWCLK
R3
2.2k
STROBE
Figure 15. AD9850/FSPCB Electrical Schematic
COMPONENT LIST
Integrated Circuits
U1 AD9850BRS (28-Lead SSOP)
U2, U3 74HCT574 H-CMOS Octal Flip-Flop
Capacitors
C2 to C5, C8 to C10 0.1 µF Ceramic Chip Capacitor
C6, C7 10 µF Tantalum Chip Capacitor
Resistors
R1 3.9 k Resistor
R2, R4 50 Resistor
R3, R8, R9, R10 2.2 k Resistor
R5 25 Resistor
R6, R7 1 k Resistor
Connectors
J1 36-Pin D Connector
J2, J3, J4 Banana Jack
J5, J6 BNC Connector
AD9850
–16–
REV. H
16a. AD9850/FSPCB Top Layer
16b. AD9850/FSPCB Ground Plane
Figure 16. AD9850/FSPCB Evaluation Board Layout
16c. AD9850/FSPCB Power Plane
16d. AD9850/FSPCB Bottom Layer

AD9850BRSZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized CMOS 125MHz Complete DDS Synthesizer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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