The Smart Timing Choice
The Smart Timing Choice
SiT3907
High Precision Digitally Controlled Oscillator (DCXO)
Rev. 1.2 Page 5 of 10 www.sitime.com
Two examples follow:
Physical Interface
The SiTime DCMO uses a serial input interface to adjust the pull frequency value. The interface uses a one-wire tri-level
return-to-middle signaling format. Figure 5 below shows the signal waveform of the interface.
Figure 5. Serial 1-Wire Tri-Level Signaling
A logical bit “1” is defined by a high-logic followed by mid-logic. A logical bit “0” is defined by a low-logic followed by mid-logic.
The voltage ranges and time durations corresponding to low-logic, high-, and mid-logic are illustrated in Figure 5 and specified
in electrical specification table.
The overall baud rate is computed as below:
Figure 6 shows a simple circuit to generate tri-level circuit with a general purpose IO (GPIO) with tri-state capability. Most
FPGAs and micro controllers/processors include such GPIOs. If the GPIO does not support tri-state output, two IO s may be
used in combination with external tri-state buffer to generate the tri-level signal; an example of such buffer is the
SN74LVC1G126. The waveform at the output of the tri-state buffer is shown in Figure 7. When the GPIO drives Low or High
voltage, the rise/fall times are typically fast (sub-5ns range). When the output is set to Hi-Z, the output settles at middle voltage
with a RC response. The time constant is determined based on the total capacitance on frequency control pin and the parallel
resistance of the pull-up and pull-down resistors. The time constant in most practical situations will be less than 50ns; this
necessitate choosing longer T_middle to allow the RC waveform to settle within 5% or so.
Example 1
This example shows how to shift the frequency by +245.6 ppm in a
device with ±1600 pull range using Mode 2 (23-bit):
Decimal value: round(245.6 * K) = 642954
23-bit value = 0x09CF8A
LS Word value = 0x000A (to be written to address 0x07)
MS Word value = 0x139F (to be written to address 0x06)
Write LS Word: 0xFA0A 07 000A (Frequency will not update)
Write MS Word: 0xFA0A 06 139F (Frequency updates after write)
Example 2
This example shows how to shift the frequency by -831.2 ppm in a
device with ±1600 pull range using Mode 2 (23-bit):
Decimal value: round(abs(831.2 * K) = 2175989
23-bit abs binary value: 01000010011001111110101
23-bit 2's comp binary value: 1011110110011000 0001011
LS Word value = 0x 000B
MS Word value = 0x BD98
Write LS Word: 0xFA0A 07 000B (Frequency will not update)
Write MS Word: 0xFA0A 06 BD98 (Frequency updates after write)
VIH
VIL
VIM
T_logic
T_middle
T_logic
T_bit T_bit
“0” “1”
0.2xVDD
0.3xVDD
0.4xVDD
0.6xVDD
0.7xVDD
0.8xVDD
