1
PS8326C 10/27/06
Description
Pericom Semiconductor’s PI74VCX16373 is particularly suitable
for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers. This device can be used as two 8-
bit latches or one 16-bit latch. When the Latch Enable (LE) input
is HIGH, the Q outputs follow the (D) inputs. When LE is taken
LOW, the Q outputs are latched at the levels set up at the D inputs.
A buffered Output Enable (OE) input can be used to place the eight
outputs in either a normal logic state (high or low logic levels) or
a high-impedance state in which the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the
increased drive provide the capability to drive bus lines without
need for interface or pullup components. OE does not affect
internal operations of the latch. Old data can be retained or new
data can be entered while the outputs are in the high impedance
state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
DD
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The PI74VCX family is I/O Tolerant, allowing it to operate in
mixed 1.8V/3.6V systems.
PI74VCX16373
16-Bit Transparent D-Type Latch
with 3-State Outputs
Block Diagram
1LE
1Q1
1D
C1
1D1
To Seven Other Channels
1OE
1
48
47
2
2LE
2Q1
1D
C1
2D1
25
36
13
24
2OE
Features
• The PI74VCX Family is designed for low voltage
operation, V
DD
= 1.8V to 3.6V
• 3.6V I/O Tolerant Inputs and Outputs
• Supports Live Insertion
• Balanced Drive, ±24mA
• Uses patented Noise Reduction Circuitry
• Typical V
OLP
(Output Ground Bounce)
< 0.6V at V
DD
= 2.5V, T
A
= 25ºC
• Typical V
OHV
(Output V
OH
Undershoot)
< –0.6V at V
DD
= 2.5V, T
A
= 25ºC
• Power-Off high impedance inputs and outputs
• Industrial operation at –40°C to +85°C
• Packaging (Pb-free & Green available):
– 48-pin 240-mil wide plastic TSSOP (A)
