15
LT1511
APPLICATIONS INFORMATION
WUU
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off instantly when the input is dead shorted to avoid large
current surges from the battery back through the charger
into the FET. Gate capacitance slows turn-off, so a small
P-channel (Q2) is to discharge the gate capacitance quickly
in the event of an input short. The body diode of Q2 creates
the necessary pumping action to keep the gate of Q1 low
during normal operation. Note that Q1 and Q2 have a V
GS
spec limit of 20V. This restricts V
IN
to a maximum of 20V.
For low dropout operation with V
IN
> 20V consult factory.
Optional Connection of Input Diode and
Current Sense Resistor
The typical application shown in Figure 1 on the first page
of this data sheet shows a single diode to isolate the V
CC
pin from the adapter input. This simple connection may be
unacceptable in situations where the main system power
must be disconnected from both the battery
and
the
adapter under some conditons. In particular, if the adapter
is disconnected or turned off and it is desired to also
Figure 13. High Speed Switching Path
LT1511 • F13
V
BAT
L1
V
IN
HIGH
FREQUENCY
CIRCULATING
PATH
BAT
SWITCH NODE
C
IN
C
OUT
D1
SW
L1
CLP
CLN
ADAPTER
IN
TO
SYSTEM
POWER
R
S1
C
IN
R
S4
R7
500Ω
C1
1µF
D3
LT1511
PARASITIC
INTERNAL
DIODE
V
CC
1511 F12a
+
+
Figure 12a. Standard Connection
1511 F12b
SW
L1
CLP
CLN
ADAPTER
IN
TO
SYSTEM
POWER
R
S1
C
IN
R
S4
R7
500Ω
C1
1µF
D4
D3
LT1511
PARASITIC
INTERNAL
DIODE
V
CC
+
+
Figure 12b. Modified Input Diode Connection
disconnect the system load from the battery, the system
will remain powered through the parasitic diode from the
SW pin to the V
CC
pin.
The circuit in Figure 12b allows system power to go to 0V
without drawing battery current by adding an additional
diode, D4. To ensure proper operation, the LT1511 current
sense amplifier inputs (CLP and CLN) were designed to
work above V
CC
and not to draw current from V
CC
when the
inputs are pulled to ground by a powered-down adapter.
Layout Considerations
Switch rise and fall times are under 10ns for maximum
efficiency. To prevent radiation, the catch diode, SW pin
and input bypass capacitor leads should be kept as short
as possible. A ground plane should be used under the
switching circuitry to prevent interplane coupling and to
act as a thermal spreading path. All ground pins should be
connected to expanded traces for low thermal resistance.
The fast-switching high current ground path, including the
switch, catch diode and input capacitor, should be kept
very short. Catch diode and input capacitor should be
close to the chip and terminated to the same point. This
path contains nanosecond rise and fall times with several
amps of current. The other paths contain only DC and/or
200kHz tri-wave and are less critical. Figure 13 indicates
the high speed, high current switching path. Figure 14
shows critical path layout. Contact Linear Technology for
an actual LT1511 circuit PCB layout or Gerber file.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
