MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
16 ______________________________________________________________________________________
OIP2 vs. RF FREQUENCY
MAX2067 toc73
RF FREQUENCY (MHz)
OIP2 (dBm)
60
70
50
40
30
50 450 850 1050650250
T
C
= +25
°
C
T
C
= -40
°
C
T
C
= +85
°
C
V
CC
= 3.3V
P
OUT
= 0dBm/TONE
OIP2 vs. RF FREQUENCY
MAX2067 toc74
RF FREQUENCY (MHz)
OIP2 (dBm)
60
70
50
40
30
50 450 850 1050650250
V
CC
= 3.3V
V
CC
= 3.0V
V
CC
= 3.6V
P
OUT
= 0dBm/TONE
OIP2 vs. ATTENUATOR STATE
MAX2067 toc75
DAC CODE
OIP2 (dBm)
70
60
50
40
30
0256192128 2241609632 64
P
OUT
= -3dBm/TONE
f
RF
= 200MHz
T
C
= +85
°
C
T
C
= -40
°
C
T
C
= +25
°
C
V
CC
= 3.3V
Typical Operating Characteristics (continued)
(V
CC
= V
DD
= +3.3V, HC mode, attenuator set for maximum gain, P
IN
= -20dBm, f
RF
= 200MHz, and T
C
= +25°C, internal DAC refer-
ence used, unless otherwise noted.)
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
______________________________________________________________________________________ 17
Pin Description
PIN NAME DESCRIPTION
1, 16, 19, 22, 24–28,
30, 31, 33–36
GND Ground
2 VREF_SELECT
DAC Reference Voltage Selection Logic Input. Logic 1 = internal DAC reference
voltage, Logic 0 = external DAC reference voltage. Logic input disabled (don’t care)
when VDAC_EN = Logic 0.
3 VDAC_EN
DAC Enable/Disable Logic Input. Logic 0 = disable DAC circuit, Logic 1 = enable
DAC circuit.
4 DATA SPI Data Digital Input
5 CLK SPI Clock Digital Input
6 CS SPI Chip-Select Digital Input
7 VDD_LOGIC
Digital Logic Supply Input. Connect to the digital logic power supply, V
DD
, Bypass
to GND with a 10nF capacitor as close as possible to the pin.
8–15, 23, 29 GND Ground. See the Pin-Compatibility Considerations section.
17 AMP_OUT Driver Amplifier Output (50). See the Typical Application Circuit for details.
18 RSET Driver Amplifier Bias-Setting Input. See the External Bias section.
20 AMP_IN Driver Amplifier Input (50). See the Typical Application Circuit for details.
21 VCC_AMP
Driver Amplifier Supply Voltage Input. Connect to the V
CC
power supply. Bypass to
GND with 1000pF and 10nF capacitors as close as possible to the pin, with the
smaller value capacitor closer to the part.
32 ATTEN_OUT
Analog Attenuator Output. Internally matched to 50. Requires an external DC-
blocking capacitor.
37 ATTEN_IN
Analog Attenuator Input. Internally matched to 50. Requires an external DC-
blocking capacitor.
38 VCC_ANALOG
Analog Bias and Control Supply Voltage Input. Bypass to GND with a 10nF
capacitor as close as possible to the pin.
39 ANALOG_VCTRL Analog Attenuator Voltage-Control Input
40 VREF_IN External DAC Voltage Reference Input
—EP
Exposed Pad. Internally connected to GND. Connect EP to ground for proper RF
performance and enhanced thermal dissipation.
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
18 ______________________________________________________________________________________
Detailed Description
The MAX2067 high-linearity analog variable-gain ampli-
fier is a general-purpose, high-performance amplifier
designed to interface with 50 systems operating in the
50MHz to 1000MHz frequency range.
The MAX2067 integrates an analog attenuator to provide
31dB of total gain control, as well as a driver amplifier
optimized to provide high gain, high IP3, low noise figure,
and low power consumption. For applications that do not
require high linearity, the bias current of the amplifier can
be adjusted by an external resistor to further reduce
power consumption.
The analog attenuator is controlled using an external
voltage or through the SPI-compatible interface using
an on-chip DAC. Because each stage has its own exter-
nal RF input and RF output, this component can be con-
figured to either optimize NF (amplifier configured first),
or OIP3 (amplifier last). The device’s performance fea-
tures include 22dB stand-alone amplifier gain (amplifier
only), 4dB NF at maximum gain (includes attenuator
insertion loss), and a high OIP3 level of +43dBm. Each
of these features makes the MAX2067 an ideal VGA for
numerous receiver and transmitter applications.
In addition, the MAX2067 operates from a single +5V
supply, or a single +3.3V supply with slightly reduced
performance, and has adjustable bias to trade current
consumption for linearity performance.
Analog Attenuator
The MAX2067’s analog attenuator has a dynamic range
of 31dB and is controlled using an external voltage or
through the 3-wire SPI using an on-chip 8-bit DAC. See
the
Applications Information
section and Table 1 for
attenuator programming details. The attenuator can be
used for both static and dynamic power control.
Driver Amplifier
The MAX2067 includes a high-performance driver with
a fixed gain of 22dB. The driver amplifier circuit is opti-
mized for high linearity for the 50MHz to 1000MHz fre-
quency range.
Applications Information
Attenuator Control
The analog attenuator is controlled by either an external
control voltage applied at ANALOG_VCTRL (pin 39) or
by the on-chip 8-bit DAC. Through the utilization of this
control DAC, the user can easily adjust the analog
attenuation in 0.12dB increments through a simple SPI
command. The DAC enable/disable logic-input pin
(VDAC_EN), and the DAC reference voltage selection
logic-input pin (VREF_SELECT) determine how the
attenuator is controlled. When the DAC is enabled,
either the on-chip voltage reference or the external volt-
age reference can be selected. See Table 1 for the
attenuator and DAC operation truth table.
Although this on-chip DAC eliminates the need for an
external analog control voltage, the user still has the
option of disabling the DAC and using an external ana-
log control voltage for instances where additional atten-
uation resolution is needed, or in cases where the gain
trim/automatic gain-control (AGC) loop is purely analog.
SPI Interface and Attenuator Settings
The MAX2067 employs a 3-wire SPI/MICROWIRE™-
compatible serial interface to program the on-chip DAC.
Eight bits of data are shifted in MSB first and framed by
CS. When CS is low, the clock is active and data is
shifted on the rising edge of the clock. When CS transi-
tions high, the data is latched and the attenuator setting
changes (Figure 1). See Table 2 for details on the SPI
data format.
Table 1. Control Logic
VDAC_EN VR EF _ SEL EC T ANALOG ATTENUATOR D/A CONVERTER
0 X Controlled by external control voltage Disabled
1 1 Controlled by on-chip DAC Enabled (DAC uses on-chip voltage reference)
1 0 Controlled by on-chip DAC E nab l ed ( D AC uses exter nal vol tag e r efer ence)
X = Don’t care.
MICROWIRE is a trademark of National Semiconductor Corp.

MAX2067ETL+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
RF Amplifier Dl 50-1000MHz Hi-Lin Analog/Digital VGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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