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CS5510-ASZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
Copyright Cirrus Logic, Inc. 2009
(All Rights Reserved)
http://www.cirrus.com
CS5510/11/12/13
16-bit and 20-bit, 8-pin
ΔΣ
ADCs
Features
Delta-sigma Analog-to-digital Converter
– Linearity Error: 0.0015% FS
– Noise-free Resolution: Up to 17 Bits
Differential Bipolar Analog Inputs
V
REF
Input Range from 250 mV to 5 V
50/60 Hz Simultaneous Rejection
(CS5510/12)
16 to 326 Sps Output Word Rate
On-chip Oscillator (CS5511/13)
Power Supply Configurations:
– V+ = 5 V, V- = 0 V
– Multiple Dual-supply Arrangements
Low Power Consumption
– Normal Mode, 2.5 mW
– Sleep Mode, 10 μW
Low-cost, Compact, 8-pin Package
Lead-free Device Package Options
General Description
The CS5510/11/12/13 are low-cost, easy-to-use, ΔΣ an-
alog-to-digital converters (ADCs) which use charge-
balance techniques to achieve 16-bit (CS5510/11) and
20-bit (CS5512/13) performance. The ADCs are avail-
able in a space-efficient, 8-pin SOIC package and are
optimized for measuring signals in weigh scale, process
control, and other industrial applications.
To accommodate these applications, the ADCs include
a fourth-order ΔΣ modulator and a digital filter. When
configured with an external master clock of 32.768 kHz,
the filter in the CS5510/12 provides better than 80 dB of
simultaneous 50 and 60 Hz line rejection, and outputs
conversion words at 53.5 Sps. The CS5511/13 include
an on-chip oscillator which eliminates the need for an ex-
ternal clock source.
Low-power, flexible supply configurations, compact pi-
nout, and ease of use make these products ideal
solutions for cost-conscience and space-constrained
applications.
ORDERING INFORMATION
See page 23.
V+
AIN+
AIN-
VREF
Clock
Gen.
1X
~0.8X
Differential
4th-order
Delta-sigma
Modulator
Digital Filter
Control
Output
SCLK
SDO
Logic
Oscillator
(CS5511/13 only)
V-
(CS5510/12 only)
CS
JUL ‘09
DS337F4
CS5510/11/12/13
2 DS337F4
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4
ANALOG CHARACTERISTICS................................................................................................ 4
DIGITAL CHARACTERISTICS................................................................................................. 5
DYNAMIC CHARACTERISTICS .............................................................................................. 6
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 6
SWITCHING CHARACTERISTICS - CS5510/12 ..................................................................... 7
SWITCHING CHARACTERISTICS - CS5511/13 ..................................................................... 8
2. GENERAL DESCRIPTION ..................................................................................................... 10
2.1 Analog Input ..................................................................................................................... 10
2.1.1 Analog Input Model ............................................................................................. 10
2.2 Voltage Reference Input .................................................................................................. 10
2.2.1 Voltage Reference Input Model ........................................................................... 11
2.3 Power Supply Arrangements ........................................................................................... 11
2.3.1 Digital Logic Levels ............................................................................................. 11
2.4 Clock Generator ............................................................................................................... 14
2.4.1 External Clock Source for CS5510/12 ................................................................ 14
2.4.2 Internal Oscillator for CS5511/13 ........................................................................ 14
2.5 Performing Conversions .................................................................................................. 15
2.5.1 Reading Conversions - CS5510/12 .....................................................................16
2.5.2 Reading Conversions - CS5511/13 .....................................................................16
2.5.3 Output Coding ..................................................................................................... 17
2.5.4 Digital Filter ......................................................................................................... 18
2.5.5 Multiplexed Applications ...................................................................................... 19
2.6 Digital Off-chip System Calibration .................................................................................. 20
2.7 Power Consumption, Sleep and Reset ............................................................................ 20
2.8 PCB Layout ...................................................................................................................... 20
3. PIN DESCRIPTIONS .............................................................................................................. 21
4. SPECIFICATION DEFINITIONS ............................................................................................. 22
5. ORDERING INFORMATION ................................................................................................... 23
6. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ............................ 23
7. PACKAGE DIMENSIONS ....................................................................................................... 24
8. REVISION HISTORY .............................................................................................................25
CS5510/11/12/13
DS337F4 3
LIST OF FIGURES
Figure 1. SDO Read Timing CS5510/12 ........................................................................................ 9
Figure 2. SDO Read Timing CS5511/13 ........................................................................................ 9
Figure 3. Input models for AIN+ and AIN- pins. ............................................................................ 10
Figure 4. CS5512/13 Measured Noise-Free Bits vs. VREF.......................................................... 11
Figure 5. Input model for VREF pin............................................................................................... 11
Figure 6. CS5510/11/12/13 Configured with a +5.0 V Analog Supply. ......................................... 12
Figure 7. CS5510/11/12/13 Configured with ±2.5 V Analog Supplies........................................... 12
Figure 8. CS5510/11/12/13 Configured with V+ = +3.3 V and
V- = -1.7 V; or V+ = +3.0 V and V- = -2.0 V.................................................................. 13
Figure 9. CS
and SCLK Digital Input Levels. ................................................................................ 14
Figure 10. SDO Digital Output Levels........................................................................................... 14
Figure 11. Serial Port Output Drive Logic. .................................................................................... 14
Figure 12. External (CMOS Compatible) Clock Source................................................................ 15
Figure 13. Using a Microcontroller as a Clock Source.................................................................. 15
Figure 14. Typical Linearity Error for CS5510............................................................................... 15
Figure 15. Typical Linearity Error for CS5512............................................................................... 15
Figure 16. Data Word Timing for the CS5510............................................................................... 16
Figure 17. Data Word Timing for the CS5511............................................................................... 17
Figure 18. Data Word Timing for the CS5512............................................................................... 17
Figure 19. Data Word Timing for the CS5513............................................................................... 17
Figure 20. Digital Filter Response................................................................................................. 19
LIST OF TABLES
Table 1. CS5512/13 Output Conversion Data Register Description (Flags + 20 bits). ................. 18
Table 2. CS5510/11 Output Conversion Data Register Description (Flags + 16 bits). ................. 18
Table 3. CS5510/11/12/13 Output Coding.................................................................................... 18
Table 4. Digital Filter Response at 32.768 kHz............................................................................ 19
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

CS5510-ASZ

Mfr. #:
Buy CS5510-ASZ
Manufacturer:
Cirrus Logic
Description:
Analog to Digital Converters - ADC 16-Bit Delta Sigma ADC Ext. OSC
Lifecycle:
New from this manufacturer.
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