CPC7691BATR Datasheet CPC7691BA, CPC7691BATR, CPC7691BBTR | P10-P12

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CPC7691

As can be seen in "Figure 1. CPC7691 Block Diagram” on

page 1 the T

control bypasses the latch, therefore

the T

control functions are independent of the latch.

On designs that do not wish to individually control the

LATCH pins of multiple-port cards it is possible to bus

many (or all) of the LATCH pins together to create a

single, board-level enable control. The weak internal

pull-up allows a fan out of up to 32 when the system’s

LATCH control driver has a logic low minimum sink

capability of 4mA.

2.4 T

Pin Description

The T

pin is a bidirectional I/O structure with an

internal pull-up current source biased from V

having

a nominal value of 16A.

As an output, this pin indicates the status of the

thermal shutdown circuitry. During normal operation

this pin will be pulled up to V

, but under fault

conditions that create excess thermal loading, the

CPC7691 will enter thermal shutdown, and a logic low

will be output at the T

pin.

As an input, T

is utilized to place the CPC7691 into

the “All-Off” state. This is accomplished by simply

pulling T

to a TTL input logic low level. When used

as an input, forcing a logic high condition at T

will

not override the thermal shutdown capability.

As discussed earlier the T

control bypasses the

latch so that neither the input nor the output control

functions are affected by the latch. Consequently,

because T

is independent of the latch, the internal

thermal shutdown function and the external “All-Off”

control features are not affected by the state of the

LATCH input.

For applications using low-voltage logic devices (lower

than V

), IXYS Integrated Circuits Division

recommends the use of an open-collector or an

open-drain type output to control T

. This avoids

sinking the T

pull-up bias current to ground during

normal operation when the All-Off state is not

required. In general, IXYS Integrated Circuits Division

recommends all applications use an open-collector or

open-drain type device to drive this pin.

2.5 Under Voltage Switch Lock Out Circuitry

2.5.1 Overview

Smart logic in the CPC7691 now provides for switch

state control during both power-up and power loss

transitions. An internal detector is used to evaluate the

supply to determine when to de-assert the under

voltage switch lock out circuitry with a rising V

and

when to assert the under voltage switch lock out

circuitry with a falling V

. Any time an unsatisfactory

low V

condition exists, the under voltage lock out

circuit overrides user switch control by blocking the

information at the external input pins, and conditioning

internal switch commands to the All-Off state. Upon

restoration of V

, the switches will remain in the

All-Off state until the LATCH input is pulled low.

The rising V

switch lock-out release threshold is

internally set to ensure all internal logic is properly

biased and functional before accepting external switch

commands at the inputs to control the switch states.

For a falling V

event, the lock-out threshold is set to

assure proper logic and switch behavior up to the

moment the switches are forced off and external

inputs are suppressed.

To facilitate hot plug insertion and system power-up

state control, the LATCH pin has an integrated weak

pull-up sourced from the V

power rail that will hold a

non-driven LATCH pin at a logic high state. This

enables board designers to use the CPC7691 with

FPGAs or other devices that provide high impedance

outputs during power-up and logic configuration.

2.5.2 Hot Plug and power-up Design Considerations

There are six possible start-up scenarios that can

occur during power-up with T

 0. They are:

1. IN

RINGING

defined at power-up & LATCH = 0

2. IN

RINGING

defined at power-up & LATCH = 1

3. IN

RINGING

defined at power-up & LATCH = Z

4. IN

RINGING

not defined at power-up & LATCH = 0

5. IN

RINGING

not defined at power-up & LATCH = 1

6. IN

RINGING

not defined at power-up & LATCH = Z

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Under all start-up situations the CPC7691 will

condition the internal switch control logic for the All-Off

state thereby ensuring all of the switches will remain

off during power-up. When V

requirements have

been satisfied the LCAS will complete it’s start-up

procedure in one of three conditions.

For start-up scenario 1, the CPC7691 will transition

from the All-Off state to the state defined by the

RINGING

input when V

is valid.

For start-up scenarios 2, 3, 5, and 6, the CPC7691 will

power up in the All-Off state and remain there until the

LATCH pin is pulled low. This allows for an indefinite

All-Off state for boards inserted into a powered system

but are not configured for service or boards that need

to wait for other devices to be configured first.

Scenario 4 will start up with all switches in the All-Off

state, but upon the acceptance of a valid V

the

LCAS will revert to either the Talk state or the Ringing

state, and thereafter may randomly change states

based on input pin leakage currents and loading. This

start-up condition should never be utilized as the

LCAS state after power-up can not be predicted.

For the start-up scenario when T

= 0 the CPC7691

will condition the internal control logic for the All-Off

state as it does when T

 0. Start-up behavior with

an initial T

= 0 is dependent on when T

released with respect to the status of the Under

Voltage Lock Out circuitry. Releasing T

(which

allows the internal pull-up to raise the input from a

logic level low to a logic level high before, or

concurrent with, the Under Voltage Lock Out

deactivation) has no effect on the start-up behavior,

and the start-up scenarios previously described are

applicable.

With T

held low beyond the deactivation of the

internal Under Voltage Lock Out control, the device will

remain in the All-Off state regardless of the levels on

the IN

RINGING

or LATCH inputs. However, it is

important to note that the LATCH is fully functional

once the Under Voltage Lock Out deactivates. This

allows the LATCH to be preconfigured to the state

desired with the release of T

2.6 V

BAT

Although battery power is not used for switch control, it

is required to direct negative potential faults away from

the SLIC. Because the CPC7691 requires V

BAT

protect the SLIC from negative potential faults, the

CPC7691 will deactivate and enter the All-Off state

whenever V

BAT

is unavailable.

2.6.1 Protection

In the presence of a negative potential fault the

CPC7691BA will draw current from V

BAT

to supply

trigger current for the internal integrated protection

circuitry SCR. This integrated SCR is designed to

activate whenever the voltage at T

BAT

or R

BAT

drops

2V to 4V below the applied voltage on the V

BAT

pin.

Because the battery supply at this pin is required to

source trigger current during negative over-voltage

fault conditions at tip and ring, it is important that the

net supplying this current be a low impedance path for

high speed transients such as lightning. This will

permit trigger currents to flow enabling the SCR to

activate, and thereby prevent a fault induced negative

over-voltage event at the T

BAT

or R

BAT

nodes.

Although the CPC7691BB does not have the SCR for

negative potential fault protection, it utilizes a power

switching diode from each of the T

BAT

and R

BAT

nodes

to V

BAT

, which forward conduct in the presence of

potentials at these nodes more negative than V

BAT

Proper protection requires V

BAT

to supply sufficient

current to counter the transient fault currents restricted

by the current limit functions of the break switches.

2.6.2 Battery Voltage Monitor

The CPC7691 also uses the V

BAT

pin to monitor the

battery voltage. If system battery voltage is lost, the

CPC7691 immediately enters the All-Off state, and

remains in this state until the battery voltage is

restored. An internal detector monitoring the system

battery voltage forces the All-Off state anytime the

battery voltage goes more positive than –10V. The

All-Off state is maintained until the battery voltage

goes more negative than –15 V. This battery monitor

feature draws a small current from V

BAT

(typically

<1A) and will add slightly to the device’s overall

power dissipation.

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CPC7691

This monitor function performs properly if the

CPC7691 and SLIC share a common battery supply

origin. Otherwise, if battery is lost to the CPC7691 but

not to the SLIC, the V

BAT

pin will be internally biased

by the potential applied at the T

BAT

or R

BAT

pins via

the internal protection circuitry.

2.7 Ringing to Talk State Switch Timing

The CPC7691 provides, when switching from the

Ringing state to the Talk state, the ability to control the

release timing of the ringing switches, SW3 and SW4,

relative to the activation of the break switches, SW1

and SW2, using simple TTL logic-level inputs. The two

available techniques are referred to as

make-before-break and break-before-make. When the

switch contacts of SW1 and SW2 are closed (made)

before the switch contacts of SW3 and SW4 are

opened (broken), this is referred to as

make-before-break operation. Break-before-make

operation occurs when the contacts of SW3 and SW4

are opened (broken) before the switch contacts of

SW1 and SW2 are closed (made). With the CPC7691,

make-before-break and break-before-make operations

can easily be accomplished by applying the proper

sequence of inputs to the device.

2.7.1 Make-Before-Break Operation

To use make-before-break operation, change

RINGING

from the Ringing state directly to the Talk

state. Assertion of the Talk state opens the ringing

return switch, SW3, as the break switches, SW1 and

SW2, close. The ringing switch, SW4, remains closed

until the next zero-crossing of the ringing current.

While in the make-before-break state, ringing

potentials in excess of the CPC7691 protection

circuitry thresholds will be diverted away from the

SLIC. This operational sequence is shown below in

the Ringing to Talk Logic Sequence: Make-Before-Break.

Ringing to Talk Logic Sequence: Make-Before-Break

2.7.2 Break-Before-Make Operation

Break-before-make switch timing is performed via the

bidirectional T

interface. As an input, T

can

disable all of the CPC7691 switches when pulled to a

logic low. Although logically disabled, an active

(closed) ringing switch (SW4) will remain active until

the next zero crossing current event. This operational

sequence is shown below in the Ringing to Talk Logic

Sequence: Break-Before-Make.

1. Pull T

to a logic low to end the ringing state.

This opens the ringing return switch (SW3) and

prevents any other switches from closing.

2. Keep T

low for at least one-half the duration of

the ringing cycle period to allow sufficient time for

a zero crossing current event to occur and for the

circuit to enter the break-before-make state.

3. During the T

low period, clear the IN

RINGING

input for the talk state (logic low).

4. Release T

allowing the internal pull-up to

activate the break switches.

When using T

as an input, the two recommended

states are “0,” which overrides the logic inputs while

forcing an All-Off state, and “Z,” which allows normal

switch control via the logic input pins. This requires the

use of an open-collector or open-drain type buffer.

State

RINGING

Latch

Timing

Break

Switches

Ringing

Return

Switch

(SW3)

Ringing

Switch

(SW4)

Ringing 1

-Off

On On

Make-

Before-

Break

SW4 waiting for next zero-current crossing to

turn off. Maximum time is one-half of the ringing

cycle. In this transition state, current that is

limited to the DC break switch current limit value

will be sourced from the ring node of the SLIC.

On Off On

Talk 0 Zero-cross current has occurred

On Off Off

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CPC7691BATR

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Manufacturer:

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Description:

Switch ICs - Various LCAS4 TTL Inputs Protection SCR

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