N34TS04
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8
SLAVE
ADDRESS
SDA LINE
BYTE
ADDRESS (n)
DATA n
SLAVE
ADDRESS
SLAVE
BUS ACTIVITY:
MASTER
BUS ACTIVITY:
MASTER
SLAVE
ADDRESS
SDA LINE
DATA (MSB)
SLAVE
SLAVE
DATA (LSB)
REGISTER
ADDRESS
ADDRESS
S
S
T
A
R
T
A
C
K
A
C
K
S
S
T
A
R
T
A
C
K
N
O
A
C
K
S
T
O
P
P
S
S
T
A
R
T
A
C
K
A
C
K
A
C
K
S
S
T
A
R
T
A
C
K
N
O
A
C
K
S
T
O
P
P
SPD
TS
Figure 11a. EEPROM Selective Read
Figure 11b. Temperature Sensor Selective Read
Figure 12. EEPROM Sequential Read
MASTER
SDA LINE
SLAVE
ADDRESS
SPD
SLAVE
DATA n DATA n+1
BUS ACTIVITY:
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
S
T
O
P
P
DATA n+2 DATA n+x
Software Write Protection
Each 1−Kb memory block can be individually protected
against Write requests. Block identities are:
Block 0: byte address 0x00...0x7F (SPD page address = 0)
Block 1: byte address 0x80...0xFF (SPD page address = 0)
Block 2: byte address 0x00...0x7F (SPD page address = 1)
Block 3: byte address 0x80...0xFF (SPD page address = 1)
Block Software Write Protection (SWP) flags can be set
or cleared in the presence of a very high voltage V
HV
on
address pin A0. The V
HV
condition must be established on
pin A0 before the START and maintained just beyond the
STOP. The D.C. OPERATING CONDITIONS for SWP
operations are shown in Table 8.
SWP command details are listed in Tables 9a and 9b.
SWP Slave addresses follow the standard I
2
C convention,
i.e. to read the state of a SWP flag, the LSB of the Slave
address must be ‘1’, and to set or clear a flag, it must be ‘0’.
For Set/Clear commands a dummy byte address and dummy
data byte must be provided (Figure 13). In contrast to a
regular memory Read, a SWP Read does not return data.
Instead the N34TS04 will respond with NoACK if the flag
is set and with ACK if the flag is not set (Figure 14).
Table 8. SWPn AND CWP D.C. OPERATION CONDITION
Symbol Parameter Test Conditions Min Max Units
DV
HV
A
0
Overdrive (V
HV
− V
CC
)
1.7 V < V
CC
< 3.6 V
4.8 V
I
HVD
A
0
High Voltage Detector Current 0.1 mA
V
HV
A
0
Very High Voltage 7 10 V
