74HC05_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 9 July 2012 6 of 15
NXP Semiconductors
74HC05-Q100
Hex inverter with open-drain outputs
10. Dynamic characteristics
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N + (0.5 C
L
V
O
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
V
O
= output voltage in V (output HIGH);
V
CC
= supply voltage in V;
N = number of inputs switching;
R
L
= load resistance in M;
C
L
= load capacitance in pF;
Table 7. Dynamic characteristics
GND = 0 V; for test circuit see Figure 7.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ Max Max
(85 C)
Max
(125 C)
t
PLZ
LOW to OFF-state
propagation delay
nA to nY; see Figure 6
V
CC
= 2.0 V - 20 90 115 135 ns
V
CC
= 4.5 V - 11 18 23 27 ns
V
CC
= 6.0 V - 10 15 20 23 ns
t
PZL
OFF-state to LOW
propagation delay
nA to nY; see Figure 6
V
CC
= 2.0 V - 22 90 115 135 ns
V
CC
= 4.5 V - 9 18 23 27 ns
V
CC
= 6.0 V - 8 15 20 23 ns
t
THL
HIGH to LOW
output transition
time
see Figure 6
V
CC
= 2.0 V - 18 75 95 110 ns
V
CC
= 4.5 V - 6 15 19 22 ns
V
CC
= 6.0 V - 5 13 16 19 ns
C
PD
power dissipation
capacitance
per inverter; V
I
=GNDtoV
CC
;
V
CC
= 5.0 V
[1]
-4- - -pF
74HC05_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 9 July 2012 7 of 15
NXP Semiconductors
74HC05-Q100
Hex inverter with open-drain outputs
11. Waveforms
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 6. The input nA to output nY propagation delays and output transition times
Table 8. Measurement points
Input Output
V
M
V
M
V
X
0.5V
CC
0.5V
CC
0.1V
CC
74HC05_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 9 July 2012 8 of 15
NXP Semiconductors
74HC05-Q100
Hex inverter with open-drain outputs
Test data is given in Table 9.
Definitions test circuit:
R
T
= termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= load capacitance including jig and probe capacitance.
R
L
= Load resistance.
Fig 7. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aad983
DUT
V
CC
V
CC
V
I
V
O
R
T
R
L
S1
C
L
open
G
Table 9. Test data
Input Load S1 position
V
I
t
r
, t
f
C
L
R
L
t
PZL
, t
PLZ
V
CC
6 ns 50 pF 1 k V
CC

74HC05PW-Q100,118

Mfr. #:
Manufacturer:
Nexperia
Description:
Inverters 74HC05PW-Q100/TSSOP14/REEL 13
Lifecycle:
New from this manufacturer.
Delivery:
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