4
COMMERCIAL TEMPERATURE RANGE
IDT74FCT810BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3,4)
FCT810BT FCT810CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay CL = 50pF 1.5 4.5 1.5 4.3 ns
tPHL INA to OAx, INA to OBxRL = 500Ω
tR Output Rise Time — 1.5 — 1.5 ns
tF Output Fall Time — 1.5 — 1.5 ns
t
SK1(O) Output skew (same bank): skew between outputs of — 0.5 — 0.3 ns
same bank and same package (same transition)
t
SK2(O) Output skew (all banks): skew between outputs of — 0.7 — 0.6 ns
all banks of same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions — 0.7 — 0.7 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 1.2 — 1 ns
packages at same power supply voltage,
temperature, package type and speed grade
t
PZL Output Enable Time 1.5 6 1.5 5 ns
tPZH OEA to OAx, OEB to OBx
t
PLZ Output Disable Time 1.5 6 1.5 5 ns
t
PHZ OEA to OAx, OEB to OBx
