10©2018 Integrated Device Technology, Inc. July 5, 2018
9FGV1006 Datasheet
1
Single CMOS driver active for each output pair.
2
See Test Loads for details.
3
I
DDCORE
= I
DDA
+ I
DDD
+ I
DDAO.
Table 12. Current Consumption
V
DDO
= 3.3V ±5%, 2.5V ±5%, 1.8V ±5%, T
A
= -40°C to +85°C unless stated otherwise.
Parameter Symbol Conditions Minimum Typical Maximum Units Notes
V
DDREF
Supply Current
I
DDREF
25MHz REFCLK. 3 4 mA
Core Supply Current I
DDCORE
2500MHz VCO, 25MHz REFCLK,
SSC Off.
38 43 mA 3
2500MHz VCO, 25MHz REFCLK,
SSC On.
38 44 mA 3
Output Buffer Supply
Current (V
DDO1
)
I
DDO
x
LVDS, 325MHz. 19 22 mA 2
LP-HCSL, 100MHz. 17 19 mA 2
LVCMOS, 50MHz. 14 17 mA 1,2
LVCMOS, 200MHz. 23 30 mA 1,2
Output Buffer Supply
Current (V
DDO0)
LVDS, 325MHz. 6 8 mA 2
LP-HCSL, 100MHz. 5 7 mA 2
LVCMOS, 50MHz. 3 5 mA 1,2
LVCMOS, 200MHz. 12 20 mA 1,2
Total Power Down Current I
DDPD
Programmable outputs in HCSL
mode, B37[0] = 0.
18 22 mA 1,2
Programmable outputs in LVDS
mode, B37[0] = 0.
25 30 mA 1,2
Programmable outputs in
LVCMOS1 mode, B37[0] = 0.
16 20 mA 1,2
Programmable outputs in HCSL
mode, B37[6,0] = 0.
811mA1,2
Programmable outputs in LVDS
mode, B37[6,0] = 0.
13 19 mA 1,2
Programmable outputs in
LVCMOS1 mode, B37[6,0] = 0.
510mA1,2
Table 13. Spread Spectrum Generation Specifications
Parameter Symbol Conditions Minimum Typical Maximum Units
Output Frequency f
OUT
Output frequency range of spread spectrum outputs. 10 312.5 MHz
Mod. Frequency f
MOD
Modulation frequency. 30 to 63 kHz
Spread% SSC%
Amount of spread value (programmable) – down spread. -0.1 to -0.5
%
Amount of spread value (programmable) – center spread. ±0.05 to ±1.5
