LTC3705
6
3705fb
UU
U
PI FU CTIO S
GND (Pin 1): Signal Ground.
I
S
(Pin 2): Input to the Overcurrent Comparator. Connect
to the positive terminal of a current-sense resistor in
series with the source of the ground-referenced bottom
MOSFET.
V
SLMT
(Pin 3): Volt-Second Limit. Form an R-C integrator
by connecting a resistor from V
IN
to V
SLMT
and a capacitor
from V
SLMT
to ground. The gate drives are turned off when
the voltage on the V
SLMT
pin exceeds 1.25V.
UVLO (Pin 4): Undervoltage Lockout. Connect to a resis-
tive voltage divider to monitor input voltage V
IN
. Enables
converter operation for V
UVLO
> 1.242V. Hysteresis is a
fixed 16mV hysteresis voltage with a 4.9µA hysteresis
current that combines with the Thevenin resistance of the
divider to set the total UVLO hysteresis voltage. This input
also senses V
IN
for voltage feedforward. Finally, this pin
can be used for external run/stop control.
SSFLT (Pin 5): Combination Soft-Start and Fault Indica-
tor. A capacitor to GND sets the duty cycle ramp-up rate
during start-up. To indicate a fault, the SSFLT pin is
momentarily pulled up to within 1.3V of V
CC
.
NDRV (Pin 6): Drive for the External NMOS of the Linear
Regulator. Connect to the gate of the NMOS and connect
a pull up resistor to the input voltage V
IN
. Optionally, to
create a trickle charger omit the NMOS device and connect
NDRV to V
CC
.
FB/IN
+
(Pin 7): This pin has several functions. The two
terminals of one pulse transformer winding are connected
to the FB/IN
+
and FS/IN
–
pins. The other pulse transformer
winding is connected to the LTC3706. The LTC3705
automatically detects when the LTC3706 applies a pulse-
encoded signal to the FB/IN
+
and FS/IN
–
pins and decodes
duty cycle information for control of the primary-side gate
drives (see Operation below). In secondary-side control,
primary-side gate drive bias power is also extracted from
the FB/IN
+
and FS/IN
–
pins using an on-chip full-wave
rectifier.
For primary-side control connect this pin to an optoisolator
for feedback control of converter output voltage using an
internal optoisolator biasing network.
FS/IN
–
(Pin 8): This pin has several functions. Place a
resistor from this pin to GND to set the oscillator fre-
quency. For secondary-side control with the LTC3706,
connect one winding of the pulse transformer for opera-
tion as described for the FB/IN
+
pin above.
PGND (Pin 9): Supply Return for the Bottom Gate Driver
and the On-Chip Bridge Rectifier.
BG (Pin 10): Bottom Gate Driver. Connect to the gate of the
“low side” external MOSFET.
V
CC
(Pin 11): Main V
CC
Power for All Driver and Control
Circuitry.
NC (Pins 12, 13): Voltage Isolation Pins. No connection.
Provided to allow adequate clearance between high-volt-
age pins (BOOST, TG, and TS) and the remainder of the
pins.
BOOST (Pin 14): Top Gate Driver Supply. Connect to V
CC
with a diode to supply power to the “high side” external
MOSFET and bypass with a capacitor to TS.
TG (Pin 15): Top Gate Driver. Connect to the gate of the
“high side” external MOSFET.
TS (Pin 16): Supply Return for the Top Gate Driver.
Connect to the source of the “high side” external MOSFET.
