DS1284/DS1286
13 of 18
POWER-UP/POWER-DOWN CONDITION
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
CE at V
IH
before Power-Down
t
PD
0
s
V
CC
Slew from 4.5V to 0V (CE at V
IH
)
t
F
350
s
V
CC
Slew from 0V to 4.5V (CE at V
IH
)
t
R
100
s
CE at V
IH
after Power-Up t
REC
150 ns
POWER-DOWN/POWER-UP CONDITION
(T
A
= +25°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Expected Data-Retention Time
(DS1286)
t
DR
10 years 9
WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed
when device is in battery-backup mode.
DS1284/DS1286
14 of 18
NOTES:
1. WE is high for a read cycle.
2. OE = V
IH
or V
IL
. If OE = V
IH
during write cycle, the output buffers remain in a high-impedance state.
3. t
WP
is specified as the logical AND of CE and WE. t
WP
is measured from the latter of CE or WE going
low to the earlier of CE or WE going high.
4. t
DS
or t
DH
are measured from the earlier of CE or WE going high.
5. t
DH
is measured from WE going high. If CE is used to terminate the write cycle, then t
DH
= 20ns.
6. If the CE low transition occurs simultaneously with or later than the WE low transition in write cycle
1, the output buffers remain in a high-impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in a high-impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high-impedance state during this period.
9. Each DS1284/DS1286 is marked with a four-digit date code AABB. AA designates the year of
manufacture. BB designates the week of manufacture. The expected t
DR
is defined as starting at the
date of manufacture.
10. All voltages are referenced to ground.
11. Applies to both interrupt pins when the alarms are set to pulse.
12. Interrupt output occurs within 100ns on the alarm condition existing.
13. RTC modules can be successfully processed through conventional wave-soldering techniques as long
as temperature exposure to the lithium energy source contained within does not exceed +85°C.
However, post-solder cleaning with water-washing techniques is acceptable, provided that ultrasonic
vibrations are not used to prevent crystal damage.
AC TEST CONDITIONS
Output Load: 100pF + 1TTL Gate
Input Pulse Levels: 0 to 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
28 PDIP P28+9 21-0044
28 PLCC Q28+11 21-0049
28 EDIP MDP28+1 21-0241
DS1284/DS1286
15 of 18
PIN CONFIGURATIONS
DQ0
PLCC
A5
A4
A3
A2
A1
A0
V
BAT
R
CLR
SQW
O
E
GND
C
E
DQ7
N.C.
X2
X1
INTA
V
CC
WE
INTB
(
INTB
)
DQ1
DQ2
GND
DQ3
DQ4
DQ5
DQ6
25
4 3 2 1 28 27 26
24
23
22
21
20
19
5
6
7
8
9
10
11
12 13 14 15 16 17 18
DS1284
DIP
(600 mils)
13
27
X2
A5
A3
A2
A1
A0
DQ0
DQ1
GND
DQ2
V
CC
INTB
(
INTB
)
SQW
O
E
GND
C
E
DQ7
DQ6
DQ5
DQ3
DQ4
1
2
3
4
5
6
7
8
9
10
11
12
14
28
26
25
24
23
22
21
20
19
18
17
15
16
X1
N.C.
A4
I
NTA
W
E
V
BAT
R
CLR
DS1284
13
27
EDIP
(720 mils)
N.C.
A5
A3
A2
A1
A0
DQ0
DQ1
GND
DQ2
V
CC
W
E
I
NTB
(
INTB
)
N.C.
N.C.
SQW
O
E
N.C.
C
E
DQ7
DQ6
DQ5
DQ3
DQ4
1
2
3
4
5
6
7
8
9
10
11
12
14
28
26
25
24
23
22
21
20
19
18
17
15
16
N.C.
N.C.
A4
I
NTA
DS1286
TOP VIEW

DS1286+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Real Time Clock
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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