January 1995 6
Philips Semiconductors Product specification
Quadruple bilateral switches
HEF4016B
gates
Notes
V
is
is the input voltage at a Y or Z terminal, whichever is assigned as input.
V
os
is the output voltage at a Y or Z terminal, whichever is assigned as output.
1. R
L
= 10 kΩ to V
SS
; C
L
= 50 pF to V
SS
; E
n
=V
DD
; V
is
=V
DD
(square-wave); see Figs 6 and 10.
2. R
L
= 10 kΩ; C
L
= 50 pF to V
SS
; E
n
=V
DD
(square-wave);
V
is
=V
DD
and R
L
to V
SS
for t
PHZ
and t
PZH
;
V
is
=V
SS
and R
L
to V
DD
for t
PLZ
and t
PZL
; see Figs 6 and 11.
3. R
L
= 10 kΩ; C
L
= 15 pF; E
n
=V
DD
; V
is
=
1
⁄
2
V
DD(p-p)
(sine-wave, symmetrical about
1
⁄
2
V
DD
);
f
is
= 1 kHz; see Fig.7.
4. R
L
=1 kΩ; V
is
=
1
⁄
2
V
DD(p-p)
(sine-wave, symmetrical about
1
⁄
2
V
DD
);
5. R
L
= 10 kΩ to V
SS
; C
L
= 15 pF to V
SS
; E
n
=V
DD
(square-wave); crosstalk is V
os
(peak value);
see Fig.6.
6. R
L
=1 kΩ; C
L
= 5 pF; E
n
=V
SS
;V
is
=
1
⁄
2
V
DD(p-p)
(sine-wave, symmetrical about
1
⁄
2
V
DD
);
7. R
L
=1 kΩ; C
L
= 5 pF; E
n
=V
DD
;V
is
=
1
⁄
2
V
DD(p-p)
(sine-wave, symmetrical about
1
⁄
2
V
DD
);
Note
1. All enable inputs switching.
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 550 f
i
+∑(f
o
C
L
) × V
DD
2
where
dissipation per 10 2 600 f
i
+∑(f
o
C
L
) × V
DD
2
f
i
= input freq. (MHz)
package (P)
(1)
15 6 500 f
i
+∑(f
o
C
L
) × V
DD
2
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
∑ (f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
20 log
V
os
(B)
V
is
(A)
-------------------
50 dB; E
n
(A) V
SS
E;
n
(B)=–= V
DD
see Fig. 8.;=
20 log
V
os
V
is
---------
50 dB; see Fig. 7.–=
20 log
V
os
V
is
---------
3 dB; see Fig. 7.–=
