P89LPC9401_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 5 September 2005 39 of 59
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment × 4 LCD driver
7.26.11 Output bank selector
The LCD controller includes a RAM bank switching feature in the static and 1:2 drive
modes. In the static drive mode, the BANK SELECT command may request the contents
of bit 2 to be selected for display instead of the contents of bit 0. In 1:2 mode, the contents
of bits 2 and 3 may be selected instead of bits 0 and 1. This allows display information to
be prepared in an alternative bank and then selected for display when it is assembled.
7.26.12 Input bank selector
The input bank selector loads display data into the display RAM based on the selected
LCD drive configuration. The BANK SELECT command can be used to load display data
in bit 2 in static drive mode or in bits 2 and 3 in 1:2 mode. The input bank selector
functions are independent of the output bank selector.
7.26.13 Blinker
The LCD controller has a very versatile display blinking capability. The whole display can
blink at a frequency selected by the BLINK command. Each blink frequency is a multiple
integer value of the clock frequency; the ratio between the clock frequency and blink
frequency depends on the blink mode selected, as shown in Table 8.
An additional feature allows an arbitrary selection of LCD segments to be blinked in the
static and 1 : 2 drive modes. This is implemented without any communication overheads
by the output bank selector which alternates the displayed data between the data in the
display RAM bank and the data in an alternative RAM bank at the blink frequency. This
mode can also be implemented by the BLINK command.
The entire display can be blinked at a frequency other than the nominal blink frequency by
sequentially resetting and setting the display enable bit E at the required rate using the
MODE SET command.
Blink modes 0.5 Hz, 1 Hz and 2 Hz, and nominal blink frequencies 0.5 Hz, 1 Hz and 2 Hz
correspond to an oscillator frequency (f
osc(LCD)
) of 1536 Hz at pin CLK. The oscillator
frequency range is 397 Hz to 3046 Hz.
7.26.13.1 I
2
C-bus controller
The LCD controller acts as an I
2
C-bus slave receiver. In the P89LPC9401 the hardware
subaddress inputs A0, A,1 and A2 are tied to V
SS
setting the hardware subaddress = 0.
7.26.14 Input filters
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
Table 8: Blinking frequencies
Blink mode Normal operating mode ratio Normal blink frequency
Off - Blinking off
2 Hz f
osc(LCD)
/ 768 2 Hz
1Hz f
osc(LCD)
/ 1536 1 Hz
0.5 Hz f
osc(LCD)
/ 3072 0.5 Hz