EVAL-ADN4650EBZ

EVAL-ADN4650EB1Z User Guide
UG-933
One Technology Way P. O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com
Evaluating the ADN4650 5 kV rms, 600 Mbps LVDS Isolator (SOIC_W)
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 9
FEATURES
Isolated ground planes (logic side and bus side)
Convenient connections through SMA terminals
3.3 V/2.5 V power on Side 1 (V
IN1
/V
DD1
) and Side 2 (V
IN2
/V
DD2
)
Ground on Side 1 (GND
1
) and Side 2 (GND
2
)
LVDS input signals: D
IN1+
, D
IN1
, D
IN2+
, D
IN2
LVDS output signals: D
OUT1+
, D
OUT1
, D
OUT2+
, D
OUT2
Jumper-selectable supply power of 3.3 V or 2.5 V
Termination resistors on all LVDS drivers/receivers
EVALUATION KIT CONTENTS
EVAL-ADN4650EB1Z evaluation board
DOCUMENTS NEEDED
ADN4650 data sheet
EQUIPMENT NEEDED
Signal generator
Oscilloscope
GENERAL DESCRIPTION
The EVAL-ADN4650EB1Z allows quick and easy evaluation of
the ADN4650 low-voltage differential signalling (LVDS) isolator
without the need for external components. The ADN4650 employs
Analog Devices, Inc., iCoupler® technology to combine a 2-channel
isolator with an LVDS receiver and driver into a single, 20-lead
wide body SOIC package. The ADN4650 is capable of running at
data rates of up to 600 Mbps with very low jitter.
The evaluation board has separate ground and power planes for
each side of the isolator. This separation enables the evaluation
of the ADN4650 with galvanic isolation between both sides of
the device. Jumper-selectable power supplies at 3.3 V or 2.5 V
are required on each side of the ADN4650. An on-chip LDO can
provide 2.5 V using an external 3.3 V power supply.
Complete information about the ADN4650 is available in the
ADN4650 data sheet, which should be consulted in conjunction
with this user guide when using the evaluation board.
EVAL-ADN4650EB1Z EVALUATION BOARD
13761-001
Figure 1.
UG-933 EVAL-ADN4650EB1Z User Guide
Rev. 0 | Page 2 of 9
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents ................................................................... 1
Documents Needed .......................................................................... 1
Equipment Needed ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Evaluation Board Configuration .................................................... 3
Setting Up the Evaluation Board .................................................3
Radiated Emissions Test Results (EN 55022) ................................5
Evaluation Board Schematic and Artwork .....................................6
Ordering Information .......................................................................9
Bill of Materials ..............................................................................9
Related Links ..................................................................................9
REVISION HISTORY
4/16Revision 0: Initial Version
EVAL-ADN4650EB1Z User Guide UG-933
Rev. 0 | Page 3 of 9
EVALUATION BOARD CONFIGURATION
SETTING UP THE EVALUATION BOARD
On the E VA L-ADN4650EB1Z, the power supplies are configured
using Jumpers P4 and P7 (see Table 1) and are connected to the
J9 and J10 SMA connectors (see Table 2 and Table 3). A 3.3 V
power supply can be applied to Side 1 and/or Side 2 of the
ADN4650 by removing Jumpers P4 (Side 1) and P7 (Side 2). If a
2.5 V power supply is connected, insert the relevant jumper
must (P4 for Side 1 and P7 for Side 2). At 300 MHz with a load
resistance of 100 Ω, the maximum operating current from each
power supply is 72 mA.
When using a 3.3 V power supply, V
IN1
and V
DD1
(Pin 1 and Pin 3
on the ADN4650) are bypassed to GND
1
on the board using 1 µF
capacitors (C18 and C2, respectively). V
IN2
and V
DD2
(Pin 20 and
Pin 18 on the ADN4650) are bypassed to GND
2
on the board using
1 µF capacitors (C19 and C6, respectively). When using a 2.5 V
power supply, V
IN1
or V
IN2
connects directly to V
DD1
or V
DD2
by
shorting Jumpers P4 or P7, respectively. Both V
DD1
pins are also
bypassed to GND
1
with 0.1 µF capacitors (C1 and C4). Both V
DD2
pins are also bypassed to GND
2
with 0.1 µF capacitors (C5and C7).
Figure 4 shows an example operation of the E VA L -ADN4650EB1Z.
SMA connectors expose all LVDS inputs and outputs (see Table 2
and Table 3). Connect a signal generator using the J1 and J2
connectors and set up a 300 MHz square wave clock with an
amplitude of 350 mV and an offset of 1.2 V. Connect the
oscilloscope directly to the J5 and J6 connectors to perform
timing measurements including propagation delay and skew.
Precision measurements, for example, jitter, using a differential
probe requires attaching the probe at the TP7 and TP8 test
points (or TP9 and TP10 for Isolator Channel 2) and potentially
cutting the traces to the connectors to minimize reflections.
Figure 2 shows a plot of the oscilloscope connected via the J5 and
J6 connectors. Oscilloscope Channel 3 (green) and Channel 4
(purple) show the J5 and J6 connectors separately (single-ended)
with the differential signal (orange).
Figure 3 shows an operation of the second isolated LVDS channel.
In contrast to Figure 2, the signal generator connects via the J3
and J4 connectors and the oscilloscope connects to the J7 and J8
connectors. Oscilloscope Channel 3 (green) and Channel 4
(purple) show the J7 and J8 connectors separately (single-ended)
with the differential signal (orange).
13761-002
Figure 2. D
OUT1−
and D
OUT1+
with a 300 MHz Clock, Single-Ended and Differential
13761-003
Figure 3. D
OUT2
and D
OUT2+
with a 300 MHz Clock, Single-Ended and Differential

EVAL-ADN4650EBZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Interface Development Tools ADN4650 SSOP Evaluation Board
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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