NCP304, NCP305
www.onsemi.com
15
OPERATING DESCRIPTION
The NCP304 and NCP305 series devices are second
generation ultra−low current voltage detectors. Figures 25
and 26 show a timing diagram and a typical application.
Initially consider that input voltage V
in
is at a nominal level
and it is greater than the voltage detector upper threshold
(V
DET+
), and the reset output (Pin 1) will be in the high state
for active low devices, or in the low state for active high
devices. If there is a power interruption and V
in
becomes
significantly deficient, it will fall below the lower detector
threshold (V
DET−
). This sequence of events causes the Reset
output to be in the low state for active low devices, or in the
high state for active high devices. After completion of the
power interruption, V
in
will again return to its nominal level
and become greater than the V
DET+
. The voltage detector
has built−in hysteresis to prevent erratic reset operation as
the comparator threshold is crossed.
Although these device series are specifically designed for
use as reset controllers in portable microprocessor based
systems, they offer a cost−effective solution in numerous
applications where precise voltage monitoring is required.
Figure 26 through Figure 32 shows various application
examples.
“L” in Part Name “H” in Part Name
Function: active Low Reset Output Function: active High Reset Output
Input < Vdet−, Reset Output is Low Input < Vdet−, Reset Output is High
Input > Vdet+, Reset Output is High Input > Vdet+, Reset Output is Low
Figure 25. Timing Waveforms
V
in
V
DET
+
V
DET−
Input Voltage, Pin 2
V
in
0 V
Reset Output (Active Low), Pin 1
Reset Output (Active High), Pin 1
V
in
0 V
V
DET
+
V
DET−
V
DET
+
V
DET−
