ISL84525IUZ-T

7
FN6042.3
February 24, 2012
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
FIGURE 3A. MEASUREMENT POINTS
Repeat test for other switches. C
L
includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
Test Circuits and Waveforms (Continued)
V
OUT
ΔV
OUT
OFF
ON
OFF
Q = ΔV
OUT
x C
L
SWITCH
OUTPUT
LOGIC
INPUT
3V
0V
C
L
V
OUT
R
G
V
G
GND
COM
NO or NC
V+
C
LOGIC
INPUT
INH
ADDX
80%
3V
0V
t
D
LOGIC
INPUT
SWITCH
OUTPUT
0V
V
OUT
t
r
< 20ns
t
f
< 20ns
LOGIC
INPUT
ADD1
COM
R
L
C
L
V
OUT
35pF
300
NO0-NO3
GND
ADD2
V+
V+
C
C
INH
LOGIC
INPUT
ADD
COM
R
L
C
L
V
OUT
35pF
300
NO
NC
V+
GND
V+
C
INH
C
ISL84524
ISL84525
ISL84524, ISL84525
8
FN6042.3
February 24, 2012
FIGURE 4. OFF ISOLATION TEST CIRCUIT FIGURE 5. R
ON
TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
R
L
SIGNAL
GENERATOR
V+
C
0V or V+
NO or NC
COM
ADDX
GND
INH
0V or V+
V+
C
0V or V+
NO or NC
COM
ADDX
GND
V
NX
V
1
R
ON
= V
1
/1mA
1mA
INH
0V or V+
ANALYZER
V+
C
NO1 or NC1
SIGNAL
GENERATOR
R
L
GND
ADD
COM1
50
NC
COM2
NO2 or NC2
INH
ISL84525
V+
C
GND
NO or NC
COM
ADDX
IMPEDANCE
ANALYZER
0V or V+
INH
ISL84524, ISL84525
9
FN6042.3
February 24, 2012
Detailed Description
The ISL84524 and ISL84525 operate from a single 2V to
12V supply with low on-resistance and high speed operation.
The devices are especially well suited to portable battery
powered equipment thanks to the low operating supply
voltage (2.7V), low power consumption (3µW), low leakage
currents (25nA max), and the tiny
MSOP packaging. High
frequency applications also benefit from the wide bandwidth,
and the very high off isolation (75dB) and crosstalk rejection
(-85dB).
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provide additional protection to limit the current in the
event that the voltage at a signal pin or logic pin goes below
ground or above the V+ rail.
Logic inputs can be protected by adding a 1k resistor in
series with the logic input (see Figure 8). The resistor limits
the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low R
ON
switch. Connecting Schottky
diodes to the signal pins (as shown in Figure 8) will shunt the
fault current to the supply or to ground thereby protecting the
switch. These Schottky diodes must be sized to handle the
expected fault current.
Power-Supply Considerations
The ISL8452X construction is typical of most CMOS analog
switches, except that they have only two supply pins: V+ and
GND. V+ and GND drive the internal CMOS switches and
set their analog voltage limits. Unlike switches with a 13V
maximum supply voltage, the ISL8452X 15V maximum
supply voltage provides plenty of room for the 10% tolerance
of 12V supplies, as well as room for overshoot and noise
spikes.
The minimum recommended supply voltage is 2V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer to
the Electrical Specification tables (starting on page 3) and
Typical Performance Curves (starting on page 10) for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is TTL compatible (0.8V and 2.4V) over a
supply range of 2V to 11V. At 12V the V
IH
level is about 2.5V.
This is still below the TTL guaranteed high output minimum
level of 2.8V, but noise margin is reduced. For best results
with a 12V supply, use a logic family that provides a V
OH
greater than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
100MHz (see Figure 13). Figure 13 also illustrates that the
frequency response is very consistent over varying analog
signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed-
through from a switch’s input to its output. Off Isolation is the
resistance to this feed-through, while Crosstalk indicates the
amount of feed-through from one switch to another.
Figure 14 details the high Off Isolation and Crosstalk
rejection provided by this family. At 10MHz, Off Isolation is
about 55dB in 50 systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
FIGURE 8. OVERVOLTAGE PROTECTION
GND
V
COM
V
NX
V+
ADD
X
OPTIONAL
PROTECTION
RESISTOR
OPTIONAL
SCHOTTKY
DIODE
OPTIONAL
SCHOTTKY
DIODE
INH
ISL84524, ISL84525

ISL84525IUZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Analog Switch ICs SWITCH DPDT 5V 150OHM 10MSOP IND
Lifecycle:
New from this manufacturer.
Delivery:
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