MGA-633P8
Ultra Low Noise, High Linearity Active Bias Low Noise Amplier
Data Sheet
Description
Avago Technologies’ MGA-633P8 is an economical, easy-
to-use GaAs MMIC Low Noise Amplier (LNA). The LNA has
low noise and high linearity achieved through the use of
Avago Technologies’ proprietary 0.25um GaAs Enhance-
ment-mode pHEMT process. It is housed in a miniature
2.0 x 2.0 x 0.75mm
3
8-pin Quad-Flat-Non-Lead (QFN)
package. It is designed for optimum use from 450MHz up
to 2GHz. The compact footprint and low prole coupled
with low noise, high gain and high linearity make the
MGA-633P8 an ideal choice as a low noise amplier for
cellular infrastructure for GSM and CDMA. For optimum
performance at higher frequency from 1.5GHz to 2.3GHz,
the MGA-634P8 is recommended, and from 2.3GHz to
4GHz, the MGA-635P8 is recommended. Both MGA-634P8
and MGA-635P8 share the same package and pinout as
MGA-633P8
Pin Conguration and Package Marking
2.0 x 2.0 x 0.75 mm
3
8-lead QFN
Note:
Package marking provides orientation and identication
“33” = Device Code
“X” = Month Code
Features
• Ultra Low noise Figure
• High linearity performance
• GaAs E-pHEMT Technology
[1]
• Low cost small package size: 2.0 x 2.0 x 0.75 mm
3
• Excellent uniformity in product specications
• Tape-and-Reel packaging option available
Specications
900MHz; 5V, 54mA
• 18 dB Gain
• 0.37 dB Noise Figure
• 15dB Input Return Loss
• 37 dBm Output IP3
• 22 dBm Output Power at 1dB gain compression
Applications
• Low noise amplier for cellular infrastructure for GSM
and CDMA.
• Other ultra low noise application.
Simplied Schematic
[2]
[1]
[3]
[4]
[7]
[8]
[6]
[5]
Top View Bottom View
[7]
[8]
[6]
[5]
[2]
[1]
[3]
[4]
33X
Pin1 – Vbias Pin5 – Not Used
Pin2 – RFinput Pin6 – Not Used
Pin3 – Not Used Pin7 – RFoutput / Vdd
Pin4 – Not Used Pin8 – Not Used
Centre tab - Ground
Notes:
• The schematic is shown with the assumption that similar PCB is used
for all MGA-633P8, MGA-634P8 and MGA-635P8.
• Detail of the components needed for this product is shown in Table 1.
• Enhancement mode technology employs positive gate voltage,
thereby eliminating the need of negative gate voltage associated
with conventional depletion mode devices.
• Good RF practice requires all unused pins to be earthed.
L1 L2
C3
C1 C2
C4
R2
RFin RFout
Vdd
[2]
[1]
[3]
[4]
[7]
[8]
[6]
[5]
C6
Rbias
R1
bias
C5
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 90 V (Class A)
ESD Human Body Model = 600 V (Class 1B)
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.