LTM8061
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pin FuncTions
GND (Bank 1): Power and Signal Ground Return.
BAT (Bank 2): Battery Charge Current Output Bus. The
charge function operates to achieve the final float voltage
at this pin. The auto-restart feature initiates a new charge
cycle when the voltage at the BAT pin falls 2.5% below
the float voltage. Once the charge cycle is terminated, the
input bias current of the BAT pin is reduced to minimize
battery discharge while the charger remains connected.
In most applications, connect BIAS to BAT.
V
INA
(Bank 3): Anode of Input Reverse Protection Schottky
Diode. Connect the input power here if input voltage pro
-
tection is desired.
V
INC
/CLP (Bank 4): This pad bank connects to the cathode
of the input reverse protection diode. In addition, system
current levels can be monitored by connecting a sense
resistor from this pin to the V
IN
pin. Additional system
load is drawn from the V
IN
pin connection, and maximum
system load is achieved when V
VINC/CLP
V
VIN
= 50mV. The
LTM8061 servos the charge current required to maintain
programmed maximum system current. If this function is
not desired, connect the V
INC
/CLP pin to the V
IN
pin (see
the Applications Information section
). Do not raise this
pin above V
IN
+ 0.5V.
V
IN
(Bank 5): Charger Input Supply. Apply C
IN
here. Con-
nect the input power here if no input power rectification
is required.
BIAS (Pin G7): The BIAS pin connects to the internal power
bus. Connect to a power source greater than 2.5V and
less than 10V. In most applications, connect BIAS to BAT.
CHRG (Pin K7): Open-Collector Charger Status Output.
Typically pulled up through a resistor to a reference volt-
age. This status pin can be pulled up to voltages as high
as V
IN
and can sink currents up to 10mA. During a battery
charge cycle, CHRG is pulled low. When the charge cycle
terminates, the CHRG pin becomes high impedance. If the
internal timer is used for termination, the pin stays low
during the charge cycle until the charge current drops below
a C/10 rate even though the charger will continue to top
off the battery until the end-of-charge timer terminates the
charge cycle. A temperature fault also causes this pin to
be pulled low (see the Applications Information section). If
RUN is low, or the LTM8061 is otherwise powered down,
the state of the
CHRG pin is invalid.
NTC (Pin H6): Battery Temperature Monitor Pin. This pin
is the input to the NTC (negative temperature coefficient)
thermistor temperature monitoring circuit. This function is
enabled by connecting a 10kΩ, β = 3380 NTC thermistor
from the NTC pin to ground. The pin sources 50μA, and
monitors the voltage across the 10kΩ thermistor. When
the voltage on this pin is above 1.36V (T < 0°C) or below
0.29V (T > 40°C), charging is disabled and the CHRG and
FAULT pins are both pulled low. If internal timer termina
-
tion is being used, the timer is paused, suspending the
charge cycle. Charging resumes when the voltage on NTC
returns to within the 0.29V to 1.36V active region. There
is approximatelyC of temperature hysteresis associated
with each of the temperature thresholds. The temperature
monitoring function remains enabled while thermistor
resistance to ground is less than 250kΩ. If this function
is not desired, leave the NTC pin unconnected.
LTM8061
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pin FuncTions
RNG/SS (Pin H7): Charge Current Programming/Soft-
Start Pin. This pin allows the maximum charge current
to be reduced from the default 2A level, and can be used
to employ a soft-start function. This pin has an effective
range from 0V to 1V, with the maximum BAT charge cur
-
rent determined by I
BAT
.
50μA is sourced from this pin, so the maximum charge
current can be programmed by connecting a resistor
(R
RNG/SS
) from RNG/SS to ground, and the maximum
battery charge current is:
I
BAT
= 2A • V
RNG/SS
I
BAT
= 2A • 50μA • R
RNG/SS
where R
RNG/SS
is less than or equal to 20kΩ. With the
RNG/SS pin left open, the charge current is 2A.
Soft-start functionality can be implemented by connect-
ing a capacitor (C
RNG/SS
) from RNG/SS to ground, such
that the time required to charge the capacitor to 1V (full
charge current) is the desired soft-start interval (t
SS
). With
no R
RNG/SS
resistor applied, this capacitor value follows
the relation:
C
RNG/SS
= 50μA • t
SS
The RNG/SS pin is pulled low during fault conditions,
allowing graceful recovery from faults should soft-
start
functionality be implemented. Both the soft-start capaci
-
tor and the programming resistor can be implemented in
parallel. All C/10 monitoring functions are disabled while
V
RNG/SS
is below 0.1V to accommodate long soft-start
intervals.
RNG/SS voltage can also be manipulated using an active
device, employing a pull-down transistor to disable charge
current or to dynamically servo maximum charge current.
Manipulation of the RNG/SS pin with active devices that
have low impedance pull-up capability is not allowed (see
the Applications Information section).
FAULT (Pin J7): Open-Collector Fault Status Output. Typi
-
cally pulled up through a resistor to a reference voltage.
This status pin can be pulled up to voltages as high as
V
IN
, and can sink currents up to 10mA. This pin indicates
charge cycle fault conditions during a battery charge cycle.
A temperature fault causes this pin to be pulled low. If the
internal timer is used for termination, a bad battery fault
also causes this pin to be pulled low. If no fault condi
-
tions exist, the FAULT pin remains high impedance (see
the Applications Information section). If RUN is low, or
the LTM8061 is otherwise powered down, the
state of the
FAULT pin is invalid.
TMR (Pin J6): End-Of-Cycle Timer Programming Pin.
If a timer-based charge termination is desired, connect
a capacitor from this pin to ground. Full charge end-of
cycle time (in hours) is programmed with this capacitor
following the equation:
t
EOC
= C
TIMER
• 4.4 • 10
6
A bad battery fault is generated if the battery does not
reach the precondition threshold voltage within one-eighth
of t
EOC
, or:
t
PRE
= C
TIMER
• 5.5 • 10
5
A 0.68μF capacitor is typically used, which generates a
timer EOC of three hours, and a precondition limit time of
22.5 minutes. If a timer-based termination is not desired,
the timer function is disabled by connecting the TMR pin
to ground. With the timer function disabled, charging
terminates when the charge current drops below a C/10
rate, or I
CHG(MAX)
/10.
RUN (Pin K6): Precision Threshold Enable Pin. The RUN
threshold is 1.20V (rising), with 120mV of input hystere-
sis. When in shutdown mode, all charging functions are
disabled. The precision threshold allows use of the RUN
pin to incorporate UVLO functions. If the RUN pin is pulled
below 0.4V, the µModule enters a low current shutdown
mode where the
V
IN
pin current is reduced to 15μA. Typical
RUN pin input bias current isA. If the shutdown function
is not desired, connect the pin to the V
IN
pin.
LTM8061
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For more information www.linear.com/LTM8601
block DiagraM
8061 BD
V
INA
8.2µH
SENSE
RESISTOR
10µF
0.1µF0.1µF
RUN
RNG/SS
TMR
NTC
BIAS
GND FAULT CHRG
V
INC
/CLP V
IN
BAT
CURRENT
MODE
BATTERY
MANAGEMENT
CONTROLLER
INTERNAL
COMPENSATION

LTM8061EV-8.4#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 32V, 2A Module Li-Ion/ Polymer Bat Ch
Lifecycle:
New from this manufacturer.
Delivery:
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