Vishay Siliconix
Si9185
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
1
Micropower 500 mA CMOS LDO Regulator
with Error Flag/Power-On-Reset
FEATURES
• Input voltage 2 V to 6 V
• Low 150 mV dropout at 500 mA load
• Guaranteed 500 mA output current
• Uses low ESR ceramic output capacitor
• Fast load and line transient response
• Only 100 µV
RMS
noise with noise bypass capacitor
• 1 µA maximum shutdown current
• Built-in short circuit and thermal protection
• Out-of-regulation error flag (power good or POR)
• Fixed 1.215 V, 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V, 5.0 V, or
adjustable output voltage options
• Other output voltages available by special order
• 1.1 W power dissipation
• Thin, thermally enhanced MLP33 PowerPAK
®
package
• Compliant to RoHS directive 2002/95/EC
APPLICATIONS
• Laptop and palm computers
• Desktop computers
• Cellular phones
• PDA, digital still cameras
DESCRIPTION
The Si9185 is a 500 mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si9185 offers line/load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO
regulators, and is designed to drive lower cost ceramic, as
well as tantalum, output capacitors. An external noise
bypass capacitor connected to the device’s C
NOISE
pin will
lower the LDO’s output noise for low noise applications. The
Si9185 also includes an out-of-regulation error flag. If a
capacitor is connected to the device’s delay pin, the error
flag output pin will generate a delayed power-on-reset
signal. The device is guaranteed stable from maximum load
current down to 0 mA load.
The Si9185 is available in both standard and lead (Pb)-free
MLP33 PowerPAK packages and is specified to operate
over the industrial temperature range of - 40 °C to 85 °C.
MLP33 PowerPAK packaging allows enhanced heat transfer
to the PC board.
TYPICAL APPLICATIONS CIRCUITS
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Figure 1. Fixed Output
C
NOISE
SD
18
DELAY ERROR
27
GND SENSE/ADJ
36
V
IN
V
OUT
45
GND
V
IN
2.2 µF 2.2 µF
V
OUT
Si9185
Figure 2. Adjustable Output
C
NOISE
18
DELAY ERROR
27
GND SENSE/ADJ
36
V
IN
V
OUT
45
GND
V
IN
2.2 µF 2.2 µF
V
OUT
Si9185
SD
Figure 3. Low Noise, Full Features Application
C
NOISE
18
DELAY ERROR
27
GND SENSE/ADJ
36
V
IN
V
OUT
45
GND
V
IN
2.2 µF 2.2 µF
V
OUT
Si9185
POR
ON/OFF
0.1 µF
0.1 F
1 MΩ
SD